Safe Class and Data Evolution in Large and Long-Lived Java Applications

There is a growing class of applications implemented in object-oriented languages that are large and complex, that exploit object persistence, and need to run uninterrupted for long periods of time. Development and maintenance of such applications can present challenges in the following interrelated areas: consistent and scalable evolution of persistent data and code, optimal build management, and runtime changes to applications. The research presented in this thesis addresses the above issues. Since Java is becoming increasingly popular platform for implementing large and long-lived applications, it was chosen for experiments. The first part of the research was undertaken in the context of the PJama system, an orthogonally persistent platform for Java. A technology that supports persistent class and object evolution for this platform was designed, built and evaluated. This technology integrates build management, persistent class evolution, and support for several forms of eager conversion of persistent objects. Research in build management for Java has resulted in the creation of a generally applicable, compiler-independent smart recompilation technology, which can be re-used in a Java IDE, or as a standalone Java-specific utility similar to make. The technology for eager object conversion that we developed allows the developers to perform arbitrarily complex changes to persistent objects and their collections. A high level of developer's control over the conversion process was achieved in part due to introduction of a mechanism for dynamic renaming of old class versions. This mechanism was implemented using minor non-standard extensions to the Java language. However, we also demonstrate how to achieve nearly the same results without modifying the language specification. In this form, we believe, our technology can be largely re-used with practically any persistent object solution for Java. The second part of this research was undertaken using as an implementation platform the HotSpot Java Virtual Machine (JVM), which is currently Sun's main production JVM. A technology was developed that allows the engineers to redefine classes on-the-fly in the running VM. Our main focus was on the runtime evolution of server-type applications, though we also address modification of applications running in the debugger. Unlike the only other similar system for Java known to us, our technology supports redefinition of classes that have methods currently active. Several policies for handling such methods have been proposed, one of them is currently operational, another one is in the experimental stage. We also propose to re-use the runtime evolution technology for dynamic fine-grain profiling of applications

Optimizing scoped and immortal memory management in real-time java

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.The Real-Time Specification for Java (RTSJ) introduces a new memory management model which avoids interfering with the garbage collection process and achieves better deterministic behaviour. In addition to the heap memory, two types of memory areas are provided - immortal and scoped. The research presented in this Thesis aims to optimize the use of the scoped and immortal memory model in RTSJ applications. Firstly, it provides an empirical study of the impact of scoped memory on execution time and memory consumption with different data objects allocated in scoped memory areas. It highlights different characteristics for the scoped memory model related to one of the RTSJ implementations (SUN RTS 2.2). Secondly, a new RTSJ case study which integrates scoped and immortal memory techniques to apply different memory models is presented. A simulation tool for a real-time Java application is developed which is the first in the literature that shows scoped memory and immortal memory consumption of an RTSJ application over a period of time. The simulation tool helps developers to choose the most appropriate scoped memory model by monitoring memory consumption and application execution time. The simulation demonstrates that a developer is able to compare and choose the most appropriate scoped memory design model that achieves the least memory footprint. Results showed that the memory design model with a higher number of scopes achieved the least memory footprint. However, the number of scopes per se does not always indicate a satisfactory memory footprint; choosing the right objects/threads to be allocated into scopes is an important factor to be considered. Recommendations and guidelines for developing RTSJ applications which use a scoped memory model are also provided. Finally, monitoring scoped and immortal memory at runtime may help in catching possible memory leaks. The case study with the simulation tool developed showed a space overhead incurred by immortal memory. In this research, dynamic code slicing is also employed as a debugging technique to explore constant increases in immortal memory. Two programming design patterns are presented for decreasing immortal memory overheads generated by specific data structures. Experimental results showed a significant decrease in immortal memory consumption at runtime

Adaptive anwendungsspezifische Verarbeitung von XML-Dokumenten

In dieser Arbeit wird ein Konzept vorgeschlagen, mit dem neue hohere Operatoren auf der Grundlage existierender Operatoren einer XML-Transformationsprache aufgebaut werden können. Durch das Zusammenfassen von immer wieder auftretenden Operatorkombinationen zu höheren Operatoren können Transformationsdefinitionen bspw. kürzer und verständlicher beschrieben werden. Zur Umsetzung des Konzeptes ist die Ausführungsumgebung XTC entstanden. XTC koordiniert den Ablauf, um höhere Operatoren in niedrigere, letztendlich elementare Operatoren einer Basistransformationssprache zu überführen. Neben XTC wird das Generatorsystem XOpGen entwickelt, welches den Implementierungsaufwand für die neuen höheren Operatoren weiter verringert. Das Potential von höheren Operatoren wird an der vom W3C standardisierten XML-Transformationssprache XSLT demonstriert. XSLT wird mit verschiedenen, sowohl universellen als auch domänenspezifischen, Operatoren erweitert

Execution level Java software and hardware for the NPS autonomous underwater vehicle

Autonomous underwater vehicles (AUVs) have a great potential use for the United States Marine Corps and United States Navy. When performing amphibious operations, underwater mines present a danger for the forces going ashore. The use of underwater vehicles for the detection of this mines and signaling to the Amphibious Ready Group is very attractive. With advancements in hardware and object oriented language technology, more complicated and robust software can be developed. The Naval Postgraduate School Center for AUV Research has been designing, building, operating, and researching AUVs since 1987. Each generation of vehicles has provided substantially increased in operational capabilities and level of sophistication in the hardware and software respectively. With the advancement in real-time computer languages support, object oriented technology, and cost efficient and high performance hardware, this thesis lays the foundations to develop a software system for the execution level using the Java language. We look into the Java Real-Time specifications and extension to familiarize with the capabilities of Java for realtime support, and study Java boards and its application for embedded real-time systems. We developed an object-oriented design for the execution level control software and implemented the design in Java. A testing phase is still under work.http://archive.org/details/executionlevelja109455509Captain, United States Marine CorpsApproved for public release; distribution is unlimited

Contributions to the safe execution of dynamic component-based real-time systems

Traditionally, real-time systems have based their design and execution on barely dynamic models to ensure, since design time, the temporal guarantees in the execution of their functionality. Great effort is being applied nowadays to progressively develop more dynamic systems, with the target of changing during their execution and to adapt themselves to their environment. The capability to change and to reconfigure themselves represents remarkable advantages as the capability to fix errors and to add new functionality with on-line updates. This means to be able to be updated without needing to stop the service, that may imply monetary losses in many cases. Design and development techniques based on components have become popular due to the use of components, which allows simplifying the system design, code reusability and updates through the substitution of components. The target of this thesis work is to provide certain degree of dynamism to real-time systems allowing them to replace components, incorporating new functionality of fixing existing bugs. On that purpose, a component-based framework is proposed, as well as the corresponding task in charge of providing dynamism to the system. The main contribution is to provide a framework to allow safe component replacements. Safe meaning that incorrect executions of tasks are avoided even y multiple tasks are executing concurrently and making use of the same data. Also that temporal guarantees are provided for every task. This framework incorporates a generic component model with real-time threads, a components replacement model with execution times that are known and bounded, and different strategies to apply such component replacement model. Some mechanisms to maintain a seamless and safe execution, regarding concurrency, before, during, and after applying the processes in charge of replacing running components are also described. Seamless execution means that components themselves do not perform the replacements, and safe means that temporal guarantees are provided and components are not affected in their execution. Part of these mechanisms are the system schedulability analysis and the framework tasks as well as reserving the needed resources for such scheduling to be correct. ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Los sistemas de tiempo real han basado tradicionalmente su desarrollo en modelos altamente predecibles ya que estos requieren garantías temporales en su ejecución. A lo largo de los años, la technología de tiempo real ha ido penetrando en diferentes campos de aplicación y ajustándose a paradigmas de desarrollo software más novedosos. Esto ha presentado y presenta en la actualidad un tremendo reto ya que estas aplicaciones suelen tener un alto grado de dinamismo, lo que entra en conflicto con la predictibilidad temporal y, en general la ejecución segura de los mismos. Hoy en dia se esta realizando un gran esfuerzo en el desarrollo de sistemas cada vez más dinamicos que permitan adaptar su estructura en tiempo de ejecución para adaptarse a entornos que presentan condiciones cambiantes. La capacidad de soportar este tipo de dinamismo presenta ventajas descatables como permitir corregir fallos y anadir funcionalidad mediante actualizaciones en caliente, es decir, poder actualizarse sin necesidad de realizar paradas en su servicio, lo que podria implicar costes monetarios en muchos casos o perdidas temporales de servicio. Por otro lado, las técnicas de diseño y desarrollo basadas en componentes se han hecho muy populares y su aplicación a los sistemas de tiempo real gana terreno día a día. Uno de los principales motivos de ellos es que el uso de componentes permite simplificar el diseño del sistema, la reutilizacion de codigo e incluso la actualizacion del mismo mediante la substitucion de componentes. En esta tesis se aborda el objetivo de proveer a los sistemas de tiempo real de cierto grado de dinamismo para poder reemplazar componentes de forma segura, que permita incorporar nuevas funcionalidades o corregir errores existentes. Para ello, en esta tesis se ha elaborado de un marco de trabajo para dar soporte a reemplazos de componentes de forma segura, entendiendo como tal que el hecho de que no se produzcan ejecuciones incorrectas debido a la ejecución concurrente de multiples tareas, asi como el garantizar los tiempos de ejecucion de cada tarea y acotar la duración temporal de los reemplazos. El marco de trabajo propuesto está basado, pues, en componentes de tiempo real, que tiene en cuenta los requisitos temporales en la ejecución de los componentes del sistema y de las tareas propias del marco que dan soporte a estos mecanismos de reemplazo. Este marco de trabajo incorpora un modelo generico de componente con tareas de tiempo real, un modelo de reemplazo de componentes cuyos tiempos de ejecucion son conocidos y limitados en tiempo y diferentes estrategias de aplicacion de dicho modelo de reemplazo de componente. Las contribuciones propuestas integran el analisis de la planificabilidad de los componentes del sistema y de las tareas del marco de componentes para permitir establecer los parámetros de reserva de los recursos necesarios para las tareas del marco. Por último, se realiza una validación empírica en la que se comprueba experimentalmente la validez del modelo tanto de forma genérica como en un escenario específico y determinando también los recursos necesarios para su implementación

Implementation of an AMIDAR-based Java Processor

This thesis presents a Java processor based on the Adaptive Microinstruction Driven Architecture (AMIDAR). This processor is intended as a research platform for investigating adaptive processor architectures. Combined with a configurable accelerator, it is able to detect and speed up hot spots of arbitrary applications dynamically. In contrast to classical RISC processors, an AMIDAR-based processor consists of four main types of components: a token machine, functional units (FUs), a token distribution network and an FU interconnect structure. The token machine is a specialized functional unit and controls the other FUs by means of tokens. These tokens are delivered to the FUs over the token distribution network. The tokens inform the FUs about what to do with input data and where to send the results. Data is exchanged among the FUs over the FU interconnect structure. Based on the virtual machine architecture defined by the Java bytecode, a total of six FUs have been developed for the Java processor, namely a frame stack, a heap manager, a thread scheduler, a debugger, an integer ALU and a floating-point unit. Using these FUs, the processor can already execute the SPEC JVM98 benchmark suite properly. This indicates that it can be employed to run a broad variety of applications rather than embedded software only. Besides bytecode execution, several enhanced features have also been implemented in the processor to improve its performance and usability. First, the processor includes an object cache using a novel cache index generation scheme that provides a better average hit rate than the classical XOR-based scheme. Second, a hardware garbage collector has been integrated into the heap manager, which greatly reduces the overhead caused by the garbage collection process. Third, thread scheduling has been realized in hardware as well, which allows it to be performed concurrently with the running application. Furthermore, a complete debugging framework has been developed for the processor, which provides powerful debugging functionalities at both software and hardware levels

Nova combinação de hardware e de software para veículos de desporto automóvel baseada no processamento directo de funções gráficas

Doutoramento em Engenharia EletrónicaThe main motivation for the work presented here began with previously conducted experiments with a programming concept at the time named "Macro". These experiments led to the conviction that it would be possible to build a system of engine control from scratch, which could eliminate many of the current problems of engine management systems in a direct and intrinsic way. It was also hoped that it would minimize the full range of software and hardware needed to make a final and fully functional system. Initially, this paper proposes to make a comprehensive survey of the state of the art in the specific area of software and corresponding hardware of automotive tools and automotive ECUs. Problems arising from such software will be identified, and it will be clear that practically all of these problems stem directly or indirectly from the fact that we continue to make comprehensive use of extremely long and complex "tool chains". Similarly, in the hardware, it will be argued that the problems stem from the extreme complexity and inter-dependency inside processor architectures. The conclusions are presented through an extensive list of "pitfalls" which will be thoroughly enumerated, identified and characterized. Solutions will also be proposed for the various current issues and for the implementation of these same solutions. All this final work will be part of a "proof-of-concept" system called "ECU2010". The central element of this system is the before mentioned "Macro" concept, which is an graphical block representing one of many operations required in a automotive system having arithmetic, logic, filtering, integration, multiplexing functions among others. The end result of the proposed work is a single tool, fully integrated, enabling the development and management of the entire system in one simple visual interface. Part of the presented result relies on a hardware platform fully adapted to the software, as well as enabling high flexibility and scalability in addition to using exactly the same technology for ECU, data logger and peripherals alike. Current systems rely on a mostly evolutionary path, only allowing online calibration of parameters, but never the online alteration of their own automotive functionality algorithms. By contrast, the system developed and described in this thesis had the advantage of following a "clean-slate" approach, whereby everything could be rethought globally. In the end, out of all the system characteristics, "LIVE-Prototyping" is the most relevant feature, allowing the adjustment of automotive algorithms (eg. Injection, ignition, lambda control, etc.) 100% online, keeping the engine constantly working, without ever having to stop or reboot to make such changes. This consequently eliminates any "turnaround delay" typically present in current automotive systems, thereby enhancing the efficiency and handling of such systems.A principal motivação para o trabalho que conduziu a esta tese residiu na constatação de que os actuais métodos de modelação de centralinas automóveis conduzem a significativos problemas de desenvolvimento e manutenção. Como resultado dessa constatação, o objectivo deste trabalho centrou-se no desenvolvimento de um conceito de arquitectura que rompe radicalmente com os modelos state-of-the-art e que assenta num conjunto de conceitos que vieram a ser designados de "Macro" e "Celular ECU". Com este modelo pretendeu-se simultaneamente minimizar a panóplia de software e de hardware necessários à obtenção de uma sistema funcional final. Inicialmente, esta tese propõem-se fazer um levantamento exaustivo do estado da arte na área específica do software e correspondente hardware das ferramentas e centralinas automóveis. Os problemas decorrentes de tal software serão identificados e, dessa identificação deverá ficar claro, que praticamente todos esses problemas têm origem directa ou indirecta no facto de se continuar a fazer um uso exaustivo de "tool chains" extremamente compridas e complexas. De forma semelhante, no hardware, os problemas têm origem na extrema complexidade e inter-dependência das arquitecturas dos processadores. As consequências distribuem-se por uma extensa lista de "pitfalls" que também serão exaustivamente enumeradas, identificadas e caracterizadas. São ainda propostas soluções para os diversos problemas actuais e correspondentes implementações dessas mesmas soluções. Todo este trabalho final faz parte de um sistema "proof-of-concept" designado "ECU2010". O elemento central deste sistema é o já referido conceito de “Macro”, que consiste num bloco gráfico que representa uma de muitas operações necessárias num sistema automóvel, como sejam funções aritméticas, lógicas, de filtragem, de integração, de multiplexagem, entre outras. O resultado final do trabalho proposto assenta numa única ferramenta, totalmente integrada que permite o desenvolvimento e gestão de todo o sistema de forma simples numa única interface visual. Parte do resultado apresentado assenta numa plataforma hardware totalmente adaptada ao software, bem como na elevada flexibilidade e escalabilidade, para além de permitir a utilização de exactamente a mesma tecnologia quer para a centralina, como para o datalogger e para os periféricos. Os sistemas actuais assentam num percurso maioritariamente evolutivo, apenas permitindo a calibração online de parâmetros, mas nunca a alteração online dos próprios algoritmos das funcionalidades automóveis. Pelo contrário, o sistema desenvolvido e descrito nesta tese apresenta a vantagem de seguir um "clean-slate approach", pelo que tudo pode ser globalmente repensado. No final e para além de todas as restantes características, o “LIVE-PROTOTYPING” é a funcionalidade mais relevante, ao permitir alterar algoritmos automóveis (ex: injecção, ignição, controlo lambda, etc.) de forma 100% online, mantendo o motor constantemente a trabalhar e sem nunca ter de o parar ou re-arrancar para efectuar tais alterações. Isto elimina consequentemente qualquer "turnaround delay" tipicamente presente em qualquer sistema automóvel actual, aumentando de forma significativa a eficiência global do sistema e da sua utilização

Middleware für Ubiquitäre Systeme: Ein Modellgetriebener Ansatz

Dieser Dissertation liegt die Hypothese zugrunde, dass modell-getriebene Softwareentwicklung (MDSD) den Widerspruch zwischen "top-down"- und "bottom-up"- Entwicklung durch einen "middle-out" Ansatz auflöst, welcher zwischen Technologie und Abstraktion vermittelt. MDSD wird als Mittel verwendet, um Middleware für Ubiquitäre Systeme auf dem einen Turm von Modellen zu bauen, ohne den Bezug zur konkreten Technologie zu verlieren

Model Checking and Model-Based Testing : Improving Their Feasibility by Lazy Techniques, Parallelization, and Other Optimizations

This thesis focuses on the lightweight formal method of model-based testing for checking safety properties, and derives a new and more feasible approach. For liveness properties, dynamic testing is impossible, so feasibility is increased by specializing on an important class of properties, livelock freedom, and deriving a more feasible model checking algorithm for it. All mentioned improvements are substantiated by experiments