Combining Static and Dynamic Features for Multivariate Sequence Classification

Model precision in a classification task is highly dependent on the feature space that is used to train the model. Moreover, whether the features are sequential or static will dictate which classification method can be applied as most of the machine learning algorithms are designed to deal with either one or another type of data. In real-life scenarios, however, it is often the case that both static and dynamic features are present, or can be extracted from the data. In this work, we demonstrate how generative models such as Hidden Markov Models (HMM) and Long Short-Term Memory (LSTM) artificial neural networks can be used to extract temporal information from the dynamic data. We explore how the extracted information can be combined with the static features in order to improve the classification performance. We evaluate the existing techniques and suggest a hybrid approach, which outperforms other methods on several public datasets.Comment: Presented at IEEE DSAA 201

Modularity in action.GNU/Linux and free/Open source sotfware development model unleashed.

Organizational and managerial theories of modularity applied to the design and production of complex artifacts are used to interpret the rise and success of Free/Open Source Software methodologies and practices in software engineeringmodularity; software project management; free/open source software; division of labor; coordination; information hiding

Hardware Synchronization for Embedded Multi-Core Processors

Abstract — Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper, establishing coherence and consistency for different types of shared memory by hardware means. Also support for point-to-point synchronization between the processor cores is realized implementing different hardware barriers. The practical examinations focus on the logical first step from single- to dual-core systems, using an FPGA-development board with two hard PowerPC processor cores. Best- and worst-case results, together with intensive benchmarking of all synchronization primitives implemented, show the expected superiority of the hardware solutions. It is also shown that dual-ported memory outperforms single-ported memory if the multiple cores use inherent parallelism by locking shared memory more intelligently using an address-sensitive method. I

A Load of Cobbler’s Children: Beyond the Model Designing Processor

HCI has developed rich understandings of people at work and at play with technology: most people that is, except designers, who remain locked in the information processing paradigm of first wave HCI. Design methods are validated as if they were computer programs, expected to produce the same results on a range of architectures and hardware. Unfortunately, designers are people, and thus interfere substantially (generally to good effects) with the ‘code’ of design methods. We need to rethink the evaluation and design of design and evaluation methods in HCI. A logocentric proposal based on resource function vocabularies is presented