MBBench: WCET Kıyaslama Kümesi

One of the important features of any real-time software is the worst-case execution time (WCET). To get an understanding of the timing behavior of real-time systems and to prove that the real-time software meets its deadlines, WCET analysis is performed. Today, researchers actively develop new WCET analysis methods and tools. Therefore, they need benchmark programs to evaluate and compare their work. To meet this need, in this study we present a new benchmark suite, called MBBench. MBBench includes a collection of C programs for Linux operating system and RTEMS real-time operating system. Its main aim is to help the evaluation and comparison of measurement-based WCET analysis methods/tools. MBBench has been published as open source. It can be obtained freely over the Internet.Herhangi bir gerçek zamanlı yazılımın en önemli özelliklerinden birisi, en kötü durum yürütme süresidir (WCET)._x000D_ Gerçek zamanlı sistemlerin zamanlama davranışını anlamak ve gerçek zamanlı yazılımın son teslim tarihlerini_x000D_ karşıladığını kanıtlamak için WCET analizi yapılır. Günümüzde araştırmacılar aktif olarak yeni WCET analiz_x000D_ yöntemleri ve araçları geliştirmektedir. Dolayısıyla, çalışmalarını değerlendirmek ve karşılaştırmak için kıyaslama_x000D_ programlarına ihtiyaç duymaktadırlar. Bu çalışmada, bu ihtiyacı karşılamaya yardımcı olmak amacıyla MBBench_x000D_ isminde yeni bir kıyaslama kümesi sunuyoruz. MBBench, Linux işletim sistemi ve RTEMS gerçek zamanlı işletim_x000D_ sistemi için C programları koleksiyonu içermektedir. Kıyaslama kümesinin temel amacı, ölçüm tabanlı WCET_x000D_ analizi yöntemlerinin/araçlarının değerlendirilmesine ve karşılaştırılmasına yardımcı olmaktır. MBBench, açık_x000D_ kaynak kodlu olarak yayınlanmıştır ve İnternet üzerinden ücretsiz olarak edinilebilir.Herhangi bir gerçek zamanlı yazılımın en önemli özelliklerinden birisi, en kötü durum yürütme süresidir (WCET). Gerçek zamanlı sistemlerin zamanlama davranışını anlamak ve gerçek zamanlı yazılımın son teslim tarihlerini karşıladığını kanıtlamak için WCET analizi yapılır. Günümüzde araştırmacılar aktif olarak yeni WCET analiz yöntemleri ve araçları geliştirmektedir. Dolayısıyla, çalışmalarını değerlendirmek ve karşılaştırmak için kıyaslama programlarına ihtiyaç duymaktadırlar. Bu çalışmada, bu ihtiyacı karşılamaya yardımcı olmak amacıyla MBBench isminde yeni bir kıyaslama kümesi sunuyoruz. MBBench, Linux işletim sistemi ve RTEMS gerçek zamanlı işletim sistemi için C programları koleksiyonu içermektedir. Kıyaslama kümesinin temel amacı, ölçüm tabanlı WCET analizi yöntemlerinin/araçlarının değerlendirilmesine ve karşılaştırılmasına yardımcı olmaktır. MBBench, açık kaynak kodlu olarak yayınlanmıştır ve İnternet üzerinden ücretsiz olarak edinilebilir

Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study

The demand for increased computing performance is driving industry in critical-embedded systems (CES) domains, e.g. space, towards the use of multicores processors. Multicores, however, pose several challenges that must be addressed before their safe adoption in critical embedded domains. One of the prominent challenges is software timing analysis, a fundamental step in the verification and validation process. Monitoring and profiling solutions, traditionally used for debugging and optimization, are increasingly exploited for software timing in multicores. In particular, hardware event monitors related to requests to shared hardware resources are building block to assess and restraining multicore interference. Modern timing analysis techniques build on event monitors to track and control the contention tasks can generate each other in a multicore platform. In this paper we look into the hardware profiling problem from an industrial perspective and address both methodological and practical problems when monitoring a multicore application. We assess pros and cons of several profiling and tracing solutions, showing that several aspects need to be taken into account while considering the appropriate mechanism to collect and extract the profiling information from a multicore COTS platform. We address the profiling problem on a representative COTS platform for the aerospace domain to find that the availability of directly-accessible hardware counters is not a given, and it may be necessary to the develop specific tools that capture the needs of both the user’s and the timing analysis technique requirements. We report challenges in developing an event monitor tracing tool that works for bare-metal and RTEMS configurations and show the accuracy of the developed tool-set in profiling a real aerospace application. We also show how the profiling tools can be exploited, together with handcrafted benchmarks, to characterize the application behavior in terms of multicore timing interference.This work has been partially supported by a collaboration agreement between Thales Research and the Barcelona Supercomputing Center, and the European Research Council (ERC) under the EU’s Horizon 2020 research and innovation programme (grant agreement No. 772773). MINECO partially supported Jaume Abella under Ramon y Cajal postdoctoral fellowship (RYC2013-14717).Peer ReviewedPostprint (published version

Autonomous Underwater Vehicle Untuk Survei Dan Pemantauan Laut

AUV is an unmanned submersible platform to accomplish a mission. Side-scan sonar, Conductivity Temperature Depth (CTD), and underwater video camera are usually attached on AUV. These sensors were used for identifying seawater and seabed condition. Data acquired from a survey with an AUV in Kepulauan Riau processed by Neptus software. Side-scan sonar (SSS) visualization is compared to the video image. SSS signal visualization has a unique pattern that can be identified within the video image. Different substrate structure caused different signal visualization. The relation between the video image and SSS visualization can be used for identifying habitat benthic profile

Partitioned System with XtratuM on PowerPC

XtratuM is a real-time hypervisor originally built on x86 architecture. It is designed referencing the concept of partitioned system. The main work in this thesis is to implement XtratuM in PowerPC architecture.Zhou, R. (2009). Partitioned System with XtratuM on PowerPC. http://hdl.handle.net/10251/12738Archivo delegad

Nuevas técnicas de inyección de fallos en sistemas embebidos mediante el uso de modelos virtuales descritos en el nivel de transacción

Mejor software y más rápido. Este es el desafío que se deriva de la necesidad de construir sistemas cada vez más inteligentes. En cualquier diseño embebido actual, el software es un componente fundamental que dota al sistema de una alta capacidad de configuración, gran número de funcionalidades y elasticidad en el comportamiento del sistema en situaciones excepcionales. Si además el desarrollo del conjunto hardware/software integrado en un System on Chip (SoC), forma parte de un sistema de control crítico donde se deben tener en cuenta requisitos de tolerancia a fallos, la verificación exhaustiva de los mismos consume un porcentaje cada vez más importante de los recursos totales dedicados al desarrollo y puesta en funcionamiento del sistema. En este contexto, el uso de metodologías clásicas de codiseño y coverificación es completamente ineficiente, siendo necesario el uso de nuevas tecnologías y herramientas para el desarrollo y verificación tempranos del software embebido. Entre ellas se puede incluir la propuesta en este trabajo de tesis, la cual aborda el problema mediante el uso de modelos ejecutables del hardware definidos en el nivel de transacción. Debido a los estrictos requisitos de robustez que imperan en el desarrollo de software espacial, es necesario llevar a cabo tareas de verificación en etapas muy tempranas del desarrollo para asegurar que los mecanismos de tolerancia a fallos, avanzados en la especificación del sistema, funcionan adecuadamente. De forma general, es deseable que estas tareas se realicen en paralelo con el desarrollo hardware, anticipando problemas o errores existentes en la especificación del sistema. Además, la verificación completa de los mecanismos de excepción implementados en el software, puede ser imposible de realizar en hardware real ya que los escenarios de fallo deben ser artificial y sistemáticamente generados mediante técnicas de inyección de fallos que permitan realizar campañas de inyección controlables, observables y reproducibles. En esta tesis se describe la investigación, desarrollo y uso de una plataforma virtual denominada "Leon2ViP", con capacidad de inyección de fallos y basada en interfaces SystemC/TLM2 para el desarrollo temprano y verificación de software embebido en el marco del proyecto Solar Orbiter. De esta forma ha sido posible ejecutar y probar exactamente el mismo código binario a ejecutar en el hardware real, pero en un entorno más controlable y determinista. Ello permite la realización de campañas de inyección de fallos muy focalizadas que no serían posible de otra manera. El uso de "\Leon2ViP" ha significado una mejora significante, en términos de coste y tiempo, en el desarrollo y verificación del software de arranque de la unidad de control del instrumento (ICU) del detector de partículas energéticas (EPD) embarcado en Solar Orbiter

PROPOSED MIDDLEWARE SOLUTION FOR RESOURCE-CONSTRAINED DISTRIBUTED EMBEDDED NETWORKS

The explosion in processing power of embedded systems has enabled distributed embedded networks to perform more complicated tasks. Middleware are sets of encapsulations of common and network/operating system-specific functionality into generic, reusable frameworks to manage such distributed networks. This thesis will survey and categorize popular middleware implementations into three adapted layers: host-infrastructure, distribution, and common services. This thesis will then apply a quantitative approach to grading and proposing a single middleware solution from all layers for two target platforms: CubeSats and autonomous unmanned aerial vehicles (UAVs). CubeSats are 10x10x10cm nanosatellites that are popular university-level space missions, and impose power and volume constraints. Autonomous UAVs are similarly-popular hobbyist-level vehicles that exhibit similar power and volume constraints. The MAVLink middleware from the host-infrastructure layer is proposed as the middleware to manage the distributed embedded networks powering these platforms in future projects. Finally, this thesis presents a performance analysis on MAVLink managing the ARM Cortex-M 32-bit processors that power the target platforms

Visualização de dados para redes de veículos autónomos

Tese de Mestrado Integrado. Engenharia Electrotécnica e de Computadores (Major Automação). Faculdade de Engenharia. Universidade do Porto. 201