69 research outputs found

    Reliability-aware circuit design to mitigate impact of device defects and variability in emerging memristor-based applications

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    In the last decades, semiconductor industry has fostered a fast downscale in technology, propelling the large scale integration of CMOS-based systems. The benefits in miniaturization are numerous, highlighting faster switching frequency, lower voltage supply and higher device density. However, this aggressive scaling trend it has not been without challenges, such as leakage currents, yield reduction or the increase in the overall system power dissipation. New materials, changes in the device structures and new architectures are key to keep the miniaturization trend. It is foreseen that 2D integration will eventually come to an insurmountable physical and economic limit, in which new strategic directions are required, such as the development of new device structures, 3D architectures or heterogeneous systems that takes advantage of the best of different technologies, both the ones already consolidated as well as emergent ones that provide performance and efficiency improvements in applications. In this context, memristor arises as one of several candidates in the race to find suitable emergent devices. Memristor, a blend of the words memory and resistor, is a passive device postulated by Leon Chua in 1971. In contrast with the other fundamental passive elements, memristors have the distinctive feature of modifying their resistance according to the charge that passes through these devices, and remaining unaltered when charge no longer flows. Although when it appeared no physical device implementation was acknowledged, HP Labs claimed in 2008 the manufacture of the first real memristor. This milestone triggered an unexpectedly high research activity about memristors, both in searching new materials and structures as well as in potential applications. Nowadays, memristors are not only appreciated in memory systems by their nonvolatile storage properties, but in many other fields, such as digital computing, signal processing circuits, or non-conventional applications like neuromorphic computing or chaotic circuits. In spite of their promising features, memristors show a primarily downside: they show significant device variation and limited lifetime due degradation compared with other alternatives. This Thesis explores the challenges that memristor variation and malfunction imposes in potential applications. The main goal is to propose circuits and strategies that either avoid reliability problems or take advantage of them. Throughout a collection of scenarios in which reliability issues are present, their impact is studied by means of simulations. This thesis is contextualized and their objectives are exposed in Chapter 1. In Chapter 2 the memristor is introduced, at both conceptual and experimental levels, and different compact levels are presented to be later used in simulations. Chapter 3 deepens in the phenomena that causes the lack of reliability in memristors, and models that include these defects in simulations are provided. The rest of the Thesis covers different applications. Therefore, Chapter 4 exhibits nonvolatile memory systems, and specifically an online test method for faulty cells. Digital computing is presented in Chapter 5, where a solution for the yield reduction in logic operations due to memristors variability is proposed. Lastly, Chapter 6 reviews applications in the analog domain, and it focuses in the exploitation of results observed in faulty memristor-based interconnect mediums for chaotic systems synchronization purposes. Finally, the Thesis concludes in Chapter 7 along with perspectives about future work.Este trabajo desarrolla un novedoso dispositivo condensador basado en el uso de la nanotecnología. El dispositivo parte del concepto existente de metal-aislador-metal (MIM), pero en lugar de una capa aislante continua, se utilizan nanopartículas dieléctricas. Las nanopartículas son principalmente de óxido de silicio (sílice) y poliestireno (PS) y los valores de diámetro son 255nm y 295nm respectivamente. Las nanopartículas contribuyen a una alta relación superficie/volumen y están fácilmente disponibles a bajo costo. La tecnología de depósito desarrollada en este trabajo se basa en la técnica de electrospray, que es una tecnología de fabricación ascendente (bottom-up) que permite el procesamiento por lotes y logra un buen compromiso entre una gran superficie y un bajo tiempo de depósito. Con el objetivo de aumentar la superficie de depósito, la configuración de electrospray ha sido ajustada para permitir áreas de depósito de 1cm2 a 25cm2. El dispositivo fabricado, los llamados condensadores de metal aislante de nanopartículas (NP-MIM) ofrecen valores de capacidad más altos que un condensador convencional similar con una capa aislante continua. En el caso de los NP-MIM de sílice, se alcanza un factor de hasta 1000 de mejora de la capacidad, mientras que los NP-MIM de poliestireno exhibe una ganancia de capacidad en el rango de 11. Además, los NP-MIM de sílice muestran comportamientos capacitivos en específicos rangos de frecuencias que depende de la humedad y el grosor de la capa de nanopartículas, mientras que los NP-MIM de poliestireno siempre mantienen su comportamiento capacitivo. Los dispositivos fabricados se han caracterizado mediante medidas de microscopía electrónica de barrido (SEM) complementadas con perforaciones de haz de iones focalizados (FIB) para caracterizar la topografía de los NP-MIMs. Los dispositivos también se han caracterizado por medidas de espectroscopia de impedancia, a diferentes temperaturas y humedades. El origen de la capacitancia aumentada está asociado en parte a la humedad en las interfaces de las nanopartículas. Se ha desarrollado un modelo de un circuito basado en elementos distribuidos para ajustar y predecir el comportamiento eléctrico de los NP-MIMs. En resumen, esta tesis muestra el diseño, fabricación, caracterización y modelización de un nuevo y prometedor condensador nanopartículas metal-aislante-metal que puede abrir el camino al desarrollo de una nueva tecnología de supercondensadores MIM.Postprint (published version

    Reliability-aware circuit design to mitigate impact of device defects and variability in emerging memristor-based applications

    Get PDF
    In the last decades, semiconductor industry has fostered a fast downscale in technology, propelling the large scale integration of CMOS-based systems. The benefits in miniaturization are numerous, highlighting faster switching frequency, lower voltage supply and higher device density. However, this aggressive scaling trend it has not been without challenges, such as leakage currents, yield reduction or the increase in the overall system power dissipation. New materials, changes in the device structures and new architectures are key to keep the miniaturization trend. It is foreseen that 2D integration will eventually come to an insurmountable physical and economic limit, in which new strategic directions are required, such as the development of new device structures, 3D architectures or heterogeneous systems that takes advantage of the best of different technologies, both the ones already consolidated as well as emergent ones that provide performance and efficiency improvements in applications. In this context, memristor arises as one of several candidates in the race to find suitable emergent devices. Memristor, a blend of the words memory and resistor, is a passive device postulated by Leon Chua in 1971. In contrast with the other fundamental passive elements, memristors have the distinctive feature of modifying their resistance according to the charge that passes through these devices, and remaining unaltered when charge no longer flows. Although when it appeared no physical device implementation was acknowledged, HP Labs claimed in 2008 the manufacture of the first real memristor. This milestone triggered an unexpectedly high research activity about memristors, both in searching new materials and structures as well as in potential applications. Nowadays, memristors are not only appreciated in memory systems by their nonvolatile storage properties, but in many other fields, such as digital computing, signal processing circuits, or non-conventional applications like neuromorphic computing or chaotic circuits. In spite of their promising features, memristors show a primarily downside: they show significant device variation and limited lifetime due degradation compared with other alternatives. This Thesis explores the challenges that memristor variation and malfunction imposes in potential applications. The main goal is to propose circuits and strategies that either avoid reliability problems or take advantage of them. Throughout a collection of scenarios in which reliability issues are present, their impact is studied by means of simulations. This thesis is contextualized and their objectives are exposed in Chapter 1. In Chapter 2 the memristor is introduced, at both conceptual and experimental levels, and different compact levels are presented to be later used in simulations. Chapter 3 deepens in the phenomena that causes the lack of reliability in memristors, and models that include these defects in simulations are provided. The rest of the Thesis covers different applications. Therefore, Chapter 4 exhibits nonvolatile memory systems, and specifically an online test method for faulty cells. Digital computing is presented in Chapter 5, where a solution for the yield reduction in logic operations due to memristors variability is proposed. Lastly, Chapter 6 reviews applications in the analog domain, and it focuses in the exploitation of results observed in faulty memristor-based interconnect mediums for chaotic systems synchronization purposes. Finally, the Thesis concludes in Chapter 7 along with perspectives about future work.Este trabajo desarrolla un novedoso dispositivo condensador basado en el uso de la nanotecnología. El dispositivo parte del concepto existente de metal-aislador-metal (MIM), pero en lugar de una capa aislante continua, se utilizan nanopartículas dieléctricas. Las nanopartículas son principalmente de óxido de silicio (sílice) y poliestireno (PS) y los valores de diámetro son 255nm y 295nm respectivamente. Las nanopartículas contribuyen a una alta relación superficie/volumen y están fácilmente disponibles a bajo costo. La tecnología de depósito desarrollada en este trabajo se basa en la técnica de electrospray, que es una tecnología de fabricación ascendente (bottom-up) que permite el procesamiento por lotes y logra un buen compromiso entre una gran superficie y un bajo tiempo de depósito. Con el objetivo de aumentar la superficie de depósito, la configuración de electrospray ha sido ajustada para permitir áreas de depósito de 1cm2 a 25cm2. El dispositivo fabricado, los llamados condensadores de metal aislante de nanopartículas (NP-MIM) ofrecen valores de capacidad más altos que un condensador convencional similar con una capa aislante continua. En el caso de los NP-MIM de sílice, se alcanza un factor de hasta 1000 de mejora de la capacidad, mientras que los NP-MIM de poliestireno exhibe una ganancia de capacidad en el rango de 11. Además, los NP-MIM de sílice muestran comportamientos capacitivos en específicos rangos de frecuencias que depende de la humedad y el grosor de la capa de nanopartículas, mientras que los NP-MIM de poliestireno siempre mantienen su comportamiento capacitivo. Los dispositivos fabricados se han caracterizado mediante medidas de microscopía electrónica de barrido (SEM) complementadas con perforaciones de haz de iones focalizados (FIB) para caracterizar la topografía de los NP-MIMs. Los dispositivos también se han caracterizado por medidas de espectroscopia de impedancia, a diferentes temperaturas y humedades. El origen de la capacitancia aumentada está asociado en parte a la humedad en las interfaces de las nanopartículas. Se ha desarrollado un modelo de un circuito basado en elementos distribuidos para ajustar y predecir el comportamiento eléctrico de los NP-MIMs. En resumen, esta tesis muestra el diseño, fabricación, caracterización y modelización de un nuevo y prometedor condensador nanopartículas metal-aislante-metal que puede abrir el camino al desarrollo de una nueva tecnología de supercondensadores MIM

    Reliability-aware circuit design to mitigate impact of device defects and variability in emerging memristor-based applications

    Get PDF
    In the last decades, semiconductor industry has fostered a fast downscale in technology, propelling the large scale integration of CMOS-based systems. The benefits in miniaturization are numerous, highlighting faster switching frequency, lower voltage supply and higher device density. However, this aggressive scaling trend it has not been without challenges, such as leakage currents, yield reduction or the increase in the overall system power dissipation. New materials, changes in the device structures and new architectures are key to keep the miniaturization trend. It is foreseen that 2D integration will eventually come to an insurmountable physical and economic limit, in which new strategic directions are required, such as the development of new device structures, 3D architectures or heterogeneous systems that takes advantage of the best of different technologies, both the ones already consolidated as well as emergent ones that provide performance and efficiency improvements in applications. In this context, memristor arises as one of several candidates in the race to find suitable emergent devices. Memristor, a blend of the words memory and resistor, is a passive device postulated by Leon Chua in 1971. In contrast with the other fundamental passive elements, memristors have the distinctive feature of modifying their resistance according to the charge that passes through these devices, and remaining unaltered when charge no longer flows. Although when it appeared no physical device implementation was acknowledged, HP Labs claimed in 2008 the manufacture of the first real memristor. This milestone triggered an unexpectedly high research activity about memristors, both in searching new materials and structures as well as in potential applications. Nowadays, memristors are not only appreciated in memory systems by their nonvolatile storage properties, but in many other fields, such as digital computing, signal processing circuits, or non-conventional applications like neuromorphic computing or chaotic circuits. In spite of their promising features, memristors show a primarily downside: they show significant device variation and limited lifetime due degradation compared with other alternatives. This Thesis explores the challenges that memristor variation and malfunction imposes in potential applications. The main goal is to propose circuits and strategies that either avoid reliability problems or take advantage of them. Throughout a collection of scenarios in which reliability issues are present, their impact is studied by means of simulations. This thesis is contextualized and their objectives are exposed in Chapter 1. In Chapter 2 the memristor is introduced, at both conceptual and experimental levels, and different compact levels are presented to be later used in simulations. Chapter 3 deepens in the phenomena that causes the lack of reliability in memristors, and models that include these defects in simulations are provided. The rest of the Thesis covers different applications. Therefore, Chapter 4 exhibits nonvolatile memory systems, and specifically an online test method for faulty cells. Digital computing is presented in Chapter 5, where a solution for the yield reduction in logic operations due to memristors variability is proposed. Lastly, Chapter 6 reviews applications in the analog domain, and it focuses in the exploitation of results observed in faulty memristor-based interconnect mediums for chaotic systems synchronization purposes. Finally, the Thesis concludes in Chapter 7 along with perspectives about future work.Este trabajo desarrolla un novedoso dispositivo condensador basado en el uso de la nanotecnología. El dispositivo parte del concepto existente de metal-aislador-metal (MIM), pero en lugar de una capa aislante continua, se utilizan nanopartículas dieléctricas. Las nanopartículas son principalmente de óxido de silicio (sílice) y poliestireno (PS) y los valores de diámetro son 255nm y 295nm respectivamente. Las nanopartículas contribuyen a una alta relación superficie/volumen y están fácilmente disponibles a bajo costo. La tecnología de depósito desarrollada en este trabajo se basa en la técnica de electrospray, que es una tecnología de fabricación ascendente (bottom-up) que permite el procesamiento por lotes y logra un buen compromiso entre una gran superficie y un bajo tiempo de depósito. Con el objetivo de aumentar la superficie de depósito, la configuración de electrospray ha sido ajustada para permitir áreas de depósito de 1cm2 a 25cm2. El dispositivo fabricado, los llamados condensadores de metal aislante de nanopartículas (NP-MIM) ofrecen valores de capacidad más altos que un condensador convencional similar con una capa aislante continua. En el caso de los NP-MIM de sílice, se alcanza un factor de hasta 1000 de mejora de la capacidad, mientras que los NP-MIM de poliestireno exhibe una ganancia de capacidad en el rango de 11. Además, los NP-MIM de sílice muestran comportamientos capacitivos en específicos rangos de frecuencias que depende de la humedad y el grosor de la capa de nanopartículas, mientras que los NP-MIM de poliestireno siempre mantienen su comportamiento capacitivo. Los dispositivos fabricados se han caracterizado mediante medidas de microscopía electrónica de barrido (SEM) complementadas con perforaciones de haz de iones focalizados (FIB) para caracterizar la topografía de los NP-MIMs. Los dispositivos también se han caracterizado por medidas de espectroscopia de impedancia, a diferentes temperaturas y humedades. El origen de la capacitancia aumentada está asociado en parte a la humedad en las interfaces de las nanopartículas. Se ha desarrollado un modelo de un circuito basado en elementos distribuidos para ajustar y predecir el comportamiento eléctrico de los NP-MIMs. En resumen, esta tesis muestra el diseño, fabricación, caracterización y modelización de un nuevo y prometedor condensador nanopartículas metal-aislante-metal que puede abrir el camino al desarrollo de una nueva tecnología de supercondensadores MIM

    Porphyrin-based metal–organic frameworks for neuromorphic electronics

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    Porphyrin-based metal–organic frameworks (PP-MOFs) have some special features beyond ordinary MOFs, including superior optoelectronic characteristics, the ability to form 2D layered structure, and customizability, which prompt the increasing attention of PP-MOFs in the field of neuromorphic electronics. The related application research is in the initial stage, and a timely summary and guidance are necessary. The PP-MOFs fabrication should be shifted from powder synthesis in a chemistry laboratory to high-quality film preparation under a clean environment to ensure device performance. This article highlights the PP-MOFs film preparation methods and the application advances in neuromorphic electronics, performs comparative analysis in detail, and puts forward the challenges and future research directions, with the aim to attract the attention of experts in various areas (e.g., chemists, materials scientists, and engineers) and promote the application of PP-MOFs in neuromorphic electronics

    An organic memristor as the building block for bio-inspired adaptive networks

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    This thesis reports the research path I followed during my PhD course, which i followed from January 2008 to December 2010 working at the University of Parma, in the Laboratory of Molecular Nanotechnologies, under the supervision of Prof. Marco P. Fontana and Dr. Victor Erokhin, within the framework of an interdisciplinary, international research project called BION – Biologically inspired Organized Networks. The keystone of my research is an organic memristor, a two terminal polymeric electronic device recently developed in our research group at the university of Parma. A memristor is a passive electronic device in which the electrical resistance depends on the electrical charge that has passed through it, and hence is adjustable by applying the appropriate electric potential or sequence of potentials. As of the beginning of my PhD, the device was in its early characterization stages, but it was already clear that it could be used to mimic the kind of plasticity found in synapses within neuronal circuits. In the thesis I show some further characterization work, used for engineering the device to maximize its more useful characteristics and to deepen our understanding of the functioning of the device, as well as the work done on. The knowledge of computational neuroscience acquired during this side project has proved very useful to better coordinate research in the material science side of the project, whose ultimate goal is the realization of a new, highly innovative technology for the production of functional molecular assemblies that can perform advanced tasks of information processing, involving learning and decision making, and that can be tailored down to the nanoscale.Questa tesi riporta il percorso di ricerca seguito durante il mio dottorato di ricerca, che ho svolto da gennaio 2008 a dicembre 2010 lavorando nel Laboratorio di Nanotecnologie Molecolari, presso l'Università di Parma, , sotto la supervisione del Prof. Marco P. Fontana e del Dott. Victor Erokhin, nel quadro di un approccio interdisciplinare, progetto di ricerca internazionale denominato BION - Biologically ispired Organized Networks . La chiave di svolta della mia ricerca è un memristor organico, un dispositivo a due terminali elettronici polimerici recentemente messo a punto nel nostro gruppo di ricerca presso l'università di Parma. Un memristor è un dispositivo elettronico passivo in cui la resistenza elettrica dipende dalla carica elettrica che è passata attraverso di essa, e quindi è regolabile applicando il potenziale elettrico appropriato o una sequenza di potenziali. A partire dall'inizio del mio dottorato di ricerca, il dispositivo è stato nelle sue fasi di caratterizzazione iniziale, ma era già chiaro che poteva essere usata per simulare il tipo di plasticità trovato in sinapsi all'interno di circuiti neuronali. Nella tesi ho mostrato un ulteriore lavoro di caratterizzazione, utilizzato per l'ingegneria del dispositivo al fine di massimizzare le sue caratteristiche più utili e di approfondire la nostra comprensione del funzionamento del dispositivo, così come il lavoro svolto. La conoscenza delle neuroscienze computazionali acquisite nel corso di questo progetto parallelo si è rivelato molto utile per meglio coordinare la ricerca per quanto riguarda il materiale scientifico del progetto, il cui scopo ultimo è la realizzazione di una nuova tecnologia altamente innovativa per la produzione di composti molecolari funzionali in grado di eseguire attività avanzate di elaborazione delle informazioni, che coinvolgano l'apprendimento e il processo decisionale, e che può essere adattata fino alla scala nanometrica

    A mathematical framework for the analysis and modelling of memristor nanodevices

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    This work presents a set of mathematical tools for the analysis and modelling of memristor devices. The mathematical framework takes advantage of the compliance of the memristor's output dynamics with the family of Bernoulli differential equations which can always be linearised under an appropriate transformation. Based on this property, a set of conditionally solvable general solutions are defined for obtaining analytically the output for all possible types of ideal memristors. To demonstrate its usefulness, the framework is applied on HP's memristor model for obtaining analytical expressions describing its output for a set of different input signals. It is shown that the output expressions can lead to the identification of a parameter which represents the collective effect of all the model's parameters on the nonlinearity of the memristor's response. The corresponding conclusions are presented for series and parallel networks of memristors as well. The analytic output expressions enable also the study of several device properties of memristors. In particular, the hysteresis of the current-voltage response and the harmonic distortion introduced by the device are investigated and both interlinked with the nonlinearity of the system. Moreover, the reciprocity principle, a property form classical circuit theory, is shown to hold for ideal memristors under specific conditions. Based on the insights gained through the analysis of the ideal element, this work takes a step further into the modelling of memristive devices in an effort to improve some of the macroscopic models currently used. In particular, a method is proposed for extracting the window function directly from experimentally acquired input-output measurements. The method is based on a simple mathematical transformation which relates window to sigmoidal functions and a set of assumptions which allow the mapping of the sigmoidal to current-voltage measurements. The equivalence between the two representations is demonstrated through a new generalised window function and several existing sigmoidals and windows. The proposed method is applied on three sets of experimental measurements which demonstrate the usefulness of the window modelling approach and the newly proposed window function. Based on this method the extracted windows are tailored to the device under investigation. The analysis also reveals a set of non-idealities which lead to the introduction of a new model for memristive devices whose response cannot be captured by the window-based approach.Open Acces

    Organic electrochemical networks for biocompatible and implantable machine learning: Organic bioelectronic beyond sensing

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    How can the brain be such a good computer? Part of the answer lies in the astonishing number of neurons and synapses that process electrical impulses in parallel. Part of it must be found in the ability of the nervous system to evolve in response to external stimuli and grow, sharpen, and depress synaptic connections. However, we are far from understanding even the basic mechanisms that allow us to think, be aware, recognize patterns, and imagine. The brain can do all this while consuming only around 20 Watts, out-competing any human-made processor in terms of energy-efficiency. This question is of particular interest in a historical era and technological stage where phrases like machine learning and artificial intelligence are more and more widespread, thanks to recent advances produced in the field of computer science. However, brain-inspired computation is today still relying on algorithms that run on traditional silicon-made, digital processors. Instead, the making of brain-like hardware, where the substrate itself can be used for computation and it can dynamically update its electrical pathways, is still challenging. In this work, I tried to employ organic semiconductors that work in electrolytic solutions, called organic mixed ionic-electronic conductors (OMIECs) to build hardware capable of computation. Moreover, by exploiting an electropolymerization technique, I could form conducting connections in response to electrical spikes, in analogy to how synapses evolve when the neuron fires. After demonstrating artificial synapses as a potential building block for neuromorphic chips, I shifted my attention to the implementation of such synapses in fully operational networks. In doing so, I borrowed the mathematical framework of a machine learning approach known as reservoir computing, which allows computation with random (neural) networks. I capitalized my work on demonstrating the possibility of using such networks in-vivo for the recognition and classification of dangerous and healthy heartbeats. This is the first demonstration of machine learning carried out in a biological environment with a biocompatible substrate. The implications of this technology are straightforward: a constant monitoring of biological signals and fluids accompanied by an active recognition of the presence of malign patterns may lead to a timely, targeted and early diagnosis of potentially mortal conditions. Finally, in the attempt to simulate the random neural networks, I faced difficulties in the modeling of the devices with the state-of-the-art approach. Therefore, I tried to explore a new way to describe OMIECs and OMIECs-based devices, starting from thermodynamic axioms. The results of this model shine a light on the mechanism behind the operation of the organic electrochemical transistors, revealing the importance of the entropy of mixing and suggesting new pathways for device optimization for targeted applications

    The effects of point defect type, location, and density on the Schottky barrier height of Au/MoS2 hetero-junction: A first-principles study

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    Using DFT calculations, we investigate the effects of the type, location, and density of point defects in monolayer MoS2 on electronic structures and Schottky barrier heights (SBH) of Au/MoS2 heterojunction. Three types of point defects in monolayer MoS2, that is, S monovacancy, S divacancy and MoS (Mo substitution at S site) antisite defects, are considered. The following findings are revealed: (1) The SBH for the monolayer MoS2 with defects is universally higher than that for its defect-free counterpart. (2) S divacancy and MoS antisite defects increase the SBH to a larger extent than S monovacancy. (3) A defect located in the inner sublayer of MoS2, which is adjacent to Au substrate, increases the SBH to a larger extent than that in the outer sublayer of MoS2. (4) An increase in defect density increases the SBH. These findings indicate a large variation of SBH with the defect type, location, and concentration. We also compare our results with previously experimentally measured SBH for Au/MoS2 contact and postulate possible reasons for the large differences among existing experimental measurements and between experimental measurements and theoretical predictions. The findings and insights revealed here may provide practice guidelines for modulation and optimization of SBH in Au/MoS2 and similar heterojunctions via defect engineering.Comment: 20 pages, 8 figure
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