Deep Learning for Frame Error Probability Prediction in BICM-OFDM Systems

In the context of wireless communications, we propose a deep learning approach to learn the mapping from the instantaneous state of a frequency selective fading channel to the corresponding frame error probability (FEP) for an arbitrary set of transmission parameters. We propose an abstract model of a bit interleaved coded modulation (BICM) orthogonal frequency division multiplexing (OFDM) link chain and show that the maximum likelihood (ML) estimator of the model parameters estimates the true FEP distribution. Further, we exploit deep neural networks as a general purpose tool to implement our model and propose a training scheme for which, even while training with the binary frame error events (i.e., ACKs / NACKs), the network outputs converge to the FEP conditioned on the input channel state. We provide simulation results that demonstrate gains in the FEP prediction accuracy with our approach as compared to the traditional effective exponential SIR metric (EESM) approach for a range of channel code rates, and show that these gains can be exploited to increase the link throughput.Comment: Submitted to 2018 IEEE International Conference on Acoustics, Speech and Signal Processin

Disjoint LDPC Coding for Gaussian Broadcast Channels

Low-density parity-check (LDPC) codes have been used for communication over a two-user Gaussian broadcast channel. It has been shown in the literature that the optimal decoding of such system requires joint decoding of both user messages at each user. Also, a joint code design procedure should be performed. We propose a method which uses a novel labeling strategy and is based on the idea behind the bit-interleaved coded modulation. This method does not require joint decoding and/or joint code optimization. Thus, it reduces the overall complexity of near-capacity coding in broadcast channels. For different rate pairs on the boundary of the capacity region, pairs of LDPC codes are designed to demonstrate the success of this technique.Comment: 5 pages, 1 figure, 3 tables, To appear in Proc. IEEE International Symposium on Information Theory (ISIT 2009), Seoul, Korea, June-July 200

The detection and extraction of interleaved code segments

This project is concerned with a specific difficulty that arises when trying to understand and modify computer programs. In particular, it is concerned with the phenomenon of 'interleaving' in which one section of a program accomplishes several purposes, and disentangling the code responsible for each purposes is difficult. Unraveling interleaved code involves discovering the purpose of each strand of computation, as well as understanding why the programmer decided to interleave the strands. Increased understanding improve the productivity and quality of software maintenance, enhancement, and documentation activities. It is the goal of the project to characterize the phenomenon of interleaving as a prerequisite for building tools to detect and extract interleaved code fragments

On the Importance of Registers for Computability

All consensus hierarchies in the literature assume that we have, in addition to copies of a given object, an unbounded number of registers. But why do we really need these registers? This paper considers what would happen if one attempts to solve consensus using various objects but without any registers. We show that under a reasonable assumption, objects like queues and stacks cannot emulate the missing registers. We also show that, perhaps surprisingly, initialization, shown to have no computational consequences when registers are readily available, is crucial in determining the synchronization power of objects when no registers are allowed. Finally, we show that without registers, the number of available objects affects the level of consensus that can be solved. Our work thus raises the question of whether consensus hierarchies which assume an unbounded number of registers truly capture synchronization power, and begins a line of research aimed at better understanding the interaction between read-write memory and the powerful synchronization operations available on modern architectures.Comment: 12 pages, 0 figure