752 research outputs found

    Test and Diagnosis of Integrated Circuits

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    The ever-increasing growth of the semiconductor market results in an increasing complexity of digital circuits. Smaller, faster, cheaper and low-power consumption are the main challenges in semiconductor industry. The reduction of transistor size and the latest packaging technology (i.e., System-On-a-Chip, System-In-Package, Trough Silicon Via 3D Integrated Circuits) allows the semiconductor industry to satisfy the latest challenges. Although producing such advanced circuits can benefit users, the manufacturing process is becoming finer and denser, making chips more prone to defects.The work presented in the HDR manuscript addresses the challenges of test and diagnosis of integrated circuits. It covers:- Power aware test;- Test of Low Power Devices;- Fault Diagnosis of digital circuits

    Analysis of Dual-Band Direction of Arrival Estimation in Multipath Scenarios

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    The present paper analyzes the performance of localization systems, based on dual-band Direction of Arrival (DoA) approach, in multi-path affected scenarios. The implemented DoA estimation, which belongs to the so-called Space and Frequency Division Multiple Access (SFDMA) technique, takes advantage of the use of two uncorrelated communication carrier frequencies, as already demonstrated by the authors. Starting from these results, this paper provides, first, the methodology followed to describe the localization system in the proposed simulation environment, and, as a second step, describes how multi-path effects may be taken into account through a set of full-wave simulations. The latter follows an approach based on the two-ray model. The validation of the proposed approach is demonstrated by simulations over a wide range of virtual scenarios. The analysis of the results highlights the ability of the proposed approach to describe multi-path effects and confirms enhancements in DoA estimation as experimentally evaluated by the same authors. To further assess the performance of the aforementioned simulation environment, a comparison between simulated and measured results was carried out, confirming the capability to predict DoA performance

    Power Integrity Analysis For Jitter Characterization

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    Continuous improvements in the VLSI domain have enabled the integration of billions of transistors on the same die operating at frequencies in the gigahertz range. These advancements have brought upon the era of system-on-chip (SoC). Traditionally, analog ICs has been prone to device noise while digital ICs have typically not been the prime concern being considered as relatively immune to noise. With faster transition times and denser integration, the scenario wherein digital ICs were considered to be immune to noise has changed significantly. Drastic changes in the physical design of an IC and increase in the operating frequencies has immensely changed the classical understanding of noise in the new age complex ICs. Switching noise specifically has become a dominating criteria for high performance digital and mixed signal ICs. Voltage variations on the power/ground nodes of a circuit is a type of switching noise affecting digital and mixed-signal ICs. Therefore, power integrity (PI) has become a critical challenge that must be addressed at the system level considering the parasitic effects of package and board. In this work, a die, package and board modeling and co-simulation methodology is presented which can be easily integrated into a standard VLSI design flow. This methodology involves breaking down the system in multiple components and generating models for each component to observe individual performance. System level response can be seen by combining them together. This approach has been successfully exploited to guarantee the power integrity on an industrial design. This approach becomes successful in providing a systematic and a widely reusable method to estimate integrity issues before fabrication, thus exhibiting its worthiness as a design step in avoiding failures and re-spins

    Sub-Picosecond Jitter Clock Generation for Time Interleaved Analog to Digital Converter

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    Nowadays, Multi-GHz analog-to-digital converters (ADCs) are becoming more and more popular in radar systems, software-defined radio (SDR) and wideband communications, because they can realize much higher operation speed through using many interleaved sub-ADCs to relax ADC sampling rates. Although the time interleaved ADC has some issues such as gain mismatch, offset mismatch and timing skew between each ADC channel, these deterministic errors can be solved by previous works such as digital calibration technique. However, time-interleaved ADCs require a precise sample clock to achieve an acceptable effective-numberof-bits (ENOB) which can be degraded by jitter in the sample clock. The clock generation circuits presented in this work achieves sub-picosecond jitter performance in 180nm CMOS which is suitable for time-interleaved ADC. Two different test chips were fabricated in 180nm CMOS to investigate the low jitter design technique. The low jitter delay line in two chips were designed in two different ways, but both of them utilized the low jitter design technique. In first test chip, the measured RMS jitter is 0.1061ps for each delay stage. The second chip uses the proposed low jitter Delay-Locked Loop can work from 80MHz to 120MHz, which means it can provide the time interleaved ADC with 2.4GHz to 3.6GHz low jitter sample clock, the measured delay stage jitter performance in second test chip is 0.1085ps

    Ultra-low noise, high-frame rate readout design for a 3D-stacked CMOS image sensor

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    Due to the switch from CCD to CMOS technology, CMOS based image sensors have become smaller, cheaper, faster, and have recently outclassed CCDs in terms of image quality. Apart from the extensive set of applications requiring image sensors, the next technological breakthrough in imaging would be to consolidate and completely shift the conventional CMOS image sensor technology to the 3D-stacked technology. Stacking is recent and an innovative technology in the imaging field, allowing multiple silicon tiers with different functions to be stacked on top of each other. The technology allows for an extreme parallelism of the pixel readout circuitry. Furthermore, the readout is placed underneath the pixel array on a 3D-stacked image sensor, and the parallelism of the readout can remain constant at any spatial resolution of the sensors, allowing extreme low noise and a high-frame rate (design) at virtually any sensor array resolution. The objective of this work is the design of ultra-low noise readout circuits meant for 3D-stacked image sensors, structured with parallel readout circuitries. The readout circuit’s key requirements are low noise, speed, low-area (for higher parallelism), and low power. A CMOS imaging review is presented through a short historical background, followed by the description of the motivation, the research goals, and the work contributions. The fundamentals of CMOS image sensors are addressed, as a part of highlighting the typical image sensor features, the essential building blocks, types of operation, as well as their physical characteristics and their evaluation metrics. Following up on this, the document pays attention to the readout circuit’s noise theory and the column converters theory, to identify possible pitfalls to obtain sub-electron noise imagers. Lastly, the fabricated test CIS device performances are reported along with conjectures and conclusions, ending this thesis with the 3D-stacked subject issues and the future work. A part of the developed research work is located in the Appendices.Devido à mudança da tecnologia CCD para CMOS, os sensores de imagem em CMOS tornam se mais pequenos, mais baratos, mais rápidos, e mais recentemente, ultrapassaram os sensores CCD no que respeita à qualidade de imagem. Para além do vasto conjunto de aplicações que requerem sensores de imagem, o próximo salto tecnológico no ramo dos sensores de imagem é o de mudar completamente da tecnologia de sensores de imagem CMOS convencional para a tecnologia “3D-stacked”. O empilhamento de chips é relativamente recente e é uma tecnologia inovadora no campo dos sensores de imagem, permitindo vários planos de silício com diferentes funções poderem ser empilhados uns sobre os outros. Esta tecnologia permite portanto, um paralelismo extremo na leitura dos sinais vindos da matriz de píxeis. Além disso, num sensor de imagem de planos de silício empilhados, os circuitos de leitura estão posicionados debaixo da matriz de píxeis, sendo que dessa forma, o paralelismo pode manter-se constante para qualquer resolução espacial, permitindo assim atingir um extremo baixo ruído e um alto debito de imagens, virtualmente para qualquer resolução desejada. O objetivo deste trabalho é o de desenhar circuitos de leitura de coluna de muito baixo ruído, planeados para serem empregues em sensores de imagem “3D-stacked” com estruturas altamente paralelizadas. Os requisitos chave para os circuitos de leitura são de baixo ruído, rapidez e pouca área utilizada, de forma a obter-se o melhor rácio. Uma breve revisão histórica dos sensores de imagem CMOS é apresentada, seguida da motivação, dos objetivos e das contribuições feitas. Os fundamentos dos sensores de imagem CMOS são também abordados para expor as suas características, os blocos essenciais, os tipos de operação, assim como as suas características físicas e suas métricas de avaliação. No seguimento disto, especial atenção é dada à teoria subjacente ao ruído inerente dos circuitos de leitura e dos conversores de coluna, servindo para identificar os possíveis aspetos que dificultem atingir a tão desejada performance de muito baixo ruído. Por fim, os resultados experimentais do sensor desenvolvido são apresentados junto com possíveis conjeturas e respetivas conclusões, terminando o documento com o assunto de empilhamento vertical de camadas de silício, junto com o possível trabalho futuro

    Characterisation of mechanical loss in fused silica ribbons for use in gravitational wave detector suspensions

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    The majority of work contained in this thesis involves characterisation of the mechanical losses in fused silica ribbon fibres to determine their potential for use in suspending the 40kg test masses for Advanced LIGO. The design of fibres is discussed here, demonstrating the advantages of rectangular cross sections over the circular cross sections already used in GEO600, with experimental work used to show the viability of this suspension scheme. The losses of a number of modes of oscillation of fibres were investigated using different suspension designs to reduce excess loss mechanisms. Measurements made of the material loss of the fused silica, using cantilever bending modes of a fibre held at one end, gave values slightly higher than those used in the design of noise curves for Advanced LIGO. The measurements also showed a reduced thermoelastic damping effect from that theoretically calculated from which an altered value for the Young’s modulus of the fibres was found compared to the value for bulk fused silica. Measurements performed using the violin modes and pendulum modes of the fibres showed that, while excess loss mechanisms were characterised and in the case of the violin mode measurement shown to be negligible, the level of dilution of loss calculated theoretically was not achieved. The source of increased loss is thought to be due to the energy being concentrated closer to lossy welded regions of the fibre. The losses measured for the linear pendulum were the lowest ever measured. Measurements of the vertical bounce mode of a small mass suspended between two fibres has shown clear evidence that there is no intrinsic stress dependence of the material loss of fused silica and has given further evidence that the majority of loss in the fibres comes from a thin highly dissipative layer on the surface. The strength of ribbon fibres has been shown to be sufficient to carry the working load of the Advanced LIGO masses, with a 20kg test suspension being created, however there was a wide variation in measured fibre breaking strengths thought to be due to bending in the fibre coupling longitudinal force into shear stress. Issues regarding thermal stress at welds are discussed with suggested solutions for construction of Advanced LIGO suspensions

    JUNO Conceptual Design Report

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    The Jiangmen Underground Neutrino Observatory (JUNO) is proposed to determine the neutrino mass hierarchy using an underground liquid scintillator detector. It is located 53 km away from both Yangjiang and Taishan Nuclear Power Plants in Guangdong, China. The experimental hall, spanning more than 50 meters, is under a granite mountain of over 700 m overburden. Within six years of running, the detection of reactor antineutrinos can resolve the neutrino mass hierarchy at a confidence level of 3-4σ\sigma, and determine neutrino oscillation parameters sin2θ12\sin^2\theta_{12}, Δm212\Delta m^2_{21}, and Δmee2|\Delta m^2_{ee}| to an accuracy of better than 1%. The JUNO detector can be also used to study terrestrial and extra-terrestrial neutrinos and new physics beyond the Standard Model. The central detector contains 20,000 tons liquid scintillator with an acrylic sphere of 35 m in diameter. \sim17,000 508-mm diameter PMTs with high quantum efficiency provide \sim75% optical coverage. The current choice of the liquid scintillator is: linear alkyl benzene (LAB) as the solvent, plus PPO as the scintillation fluor and a wavelength-shifter (Bis-MSB). The number of detected photoelectrons per MeV is larger than 1,100 and the energy resolution is expected to be 3% at 1 MeV. The calibration system is designed to deploy multiple sources to cover the entire energy range of reactor antineutrinos, and to achieve a full-volume position coverage inside the detector. The veto system is used for muon detection, muon induced background study and reduction. It consists of a Water Cherenkov detector and a Top Tracker system. The readout system, the detector control system and the offline system insure efficient and stable data acquisition and processing.Comment: 328 pages, 211 figure

    Empirical timing analysis of CPUs and delay fault tolerant design using partial redundancy

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    The operating clock frequency is determined by the longest signal propagation delay, setup/hold time, and timing margin. These are becoming less predictable with the increasing design complexity and process miniaturization. The difficult challenge is then to ensure that a device operating at its clock frequency is error-free with quantifiable assurance. Effort at device-level engineering will not suffice for these circuits exhibiting wide process variation and heightened sensitivities to operating condition stress. Logic-level redress of this issue is a necessity and we propose a design-level remedy for this timing-uncertainty problem. The aim of the design and analysis approaches presented in this dissertation is to provide framework, SABRE, wherein an increased operating clock frequency can be achieved. The approach is a combination of analytical modeling, experimental analy- sis, hardware /time-redundancy design, exception handling and recovery techniques. Our proposed design replicates only a necessary part of the original circuit to avoid high hardware overhead as in triple-modular-redundancy (TMR). The timing-critical combinational circuit is path-wise partitioned into two sections. The combinational circuits associated with long paths are laid out without any intrusion except for the fan-out connections from the first section of the circuit to a replicated second section of the combinational circuit. Thus only the second section of the circuit is replicated. The signals fanning out from the first section are latches, and thus are far shorter than the paths spanning the entire combinational circuit. The replicated circuit is timed at a subsequent clock cycle to ascertain relaxed timing paths. This insures that the likelihood of mistiming due to stress or process variation is eliminated. During the subsequent clock cycle, the outcome of the two logically identical, yet time-interleaved, circuit outputs are compared to detect faults. When a fault is detected, the retry sig- nal is triggered and the dynamic frequency-step-down takes place before a pipe flush, and retry is issued. The significant timing overhead associated with the retry is offset by the rarity of the timing violation events. Simulation results on ISCAS Benchmark circuits show that 10% of clock frequency gain is possible with 10 to 20 % of hardware overhead of replicated timing-critical circuit

    Contribution to ground-based and UAV SAR systems for Earth observation

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    Mankind's way of life is the main driver of a planetary-scale change that is marked by the growing of human population's demand of energy, food, goods, services and information. As a result, it have emerged new ecological, economical, social and geopolitical concerns. In this scenario, SAR remote sensing is a potential tool that provides unique information about the Earth's properties and processes that can be used to solve societal challenges of local and global dimension. SARs, which are coherent systems that are able to provide high resolution images with weather independence, represent a suitable alternative for EO with diverse applications. Some examples of SAR application areas are topography (DEM generation with interferometry), agriculture (crop classification or soil moisture), or geology (monitoring surface deformation). In this framework, the encompassing objective of the present doctoral work has been part of the implementation and the subsequent evaluation of capabilities of two X-band SAR sensors. On the one hand, the RISKSAR-X radar designed to be operated at ground to monitor small-scale areas of observation and, on the other, the ARBRES-X sensor designed to be integrated into small UAVs. Despite its inherently dissimilar conception, the concurrence of both sensors has been evidenced along this manuscript. By taking advantage of the similarities between them, it has been possible to analogously assess both sensors to obtain conclusions. In this context, the common link has been the development of the polarimetric OtF operation mode of the RISKSAR-X, allowing this sensor to be operated equivalently to the ARBRES-X. Regarding the RISKSAR-X SAR sensor, several hardware contributions have been developed during part of this Ph.D. with the aim of improving the system performance. By endowing the system with the capability to operate in the fully polarimetric OtF acquisition mode, the relative long scanning time has been reduced. It is of great interest since the measured scatterers that present a short term variable reflectivity during the scanning time, such as moving vegetation, may degrade the extracted parameters from the retrieved data and the SAR image reconstruction. During this doctoral activity, it has been studied the image blurring, the decorrelation and the coherence degradation introduced by this effect. Furthermore, a new term in the differential interferometric coherence that takes into account the image blurring has been introduced. Concerning the ARBRES-X SAR system, one of the main objectives pursued during this Ph.D. has been the integration of the sensor into a small UAV MP overcoming restrictions of weight, size and aerodynamics of the platform. The use of this type of platforms is expected to open up new possibilities in airborne SAR remote sensing, since it offers much more versatility than the commonly used fixed wings UAVs. Different innovative flight strategies with this type of platforms have been assessed and some preliminary results have been obtained with the use of the ARBRES-X SAR system. During the course of the present doctoral work, much effort has been devoted to achieve the first experimental repeat-pass interfereometric results obtained with the UAV MP together with the ARBRES-X. Moreover, the sensor has been endowed with fully polarimetric capabilities by applying the improvements developed to the RISKSAR-X radar, which is another example of the duality between both systems. Finally, a vertical and a semicircular aperture have been successfully performed obtaining SLC images of the scenario, which envisages the capability of the UAV MP to perform tomographic images and complete circular apertures in the future. In conclusion, the UAV MP is a promising platform that opens new potentials for several applications, such as repeat-pass interferometry or differential tomography imaging with the realization of almost arbitrary trajectories.El mode de viure de la humanitat és el principal motor d'un canvi a escala planetària que està marcat per la creixent demanda d'energia, d'aliment, de béns, de serveis i d'informació de les poblacions humanes. Com a resultat, han sorgit noves inquietuds ecològiques, econòmiques, socials i geopolítiques. En aquest escenari, la detecció remota SAR és una eina potencial que proporciona informació única sobre les propietats i processos de la Terra que es pot utilitzar per resoldre reptes socials de dimensió local i global. Els SARs, que són sistemes coherents que poden proporcionar imatges d'alta resolució amb independència del temps, representen una alternativa adequada per a l'observació de la Terra. Alguns exemples d'àrees d'aplicació SAR són la topografia (generació de DEM amb interferometria), l'agricultura (classificació de cultius o humitat del sòl) o la geologia (monitoratge de deformació superficial). En aquest context, l'objectiu general del present doctorat ha estat part de la implementació i posterior avaluació de les capacitats de dos sensors SAR de banda X. D'una banda, el radar RISKSAR-X dissenyat per funcionar a terra i monitoritzar àrees d'observació a petita escala i, d'altra, el sensor ARBRES-X dissenyat per ser integrat en petits UAVs. Malgrat la seva concepció inherentment diferent, la concurrència d'ambdós sensors s'ha evidenciat al llarg d'aquest manuscrit. Aprofitant les similituds entre ells, s'han pogut avaluar de forma anàloga els dos sensors per obtenir conclusions. En aquest sentit, el vincle comú ha estat el desenvolupament del mode de funcionament polimètric OtF del RISKSAR-X, permetent que aquest sensor operi de forma equivalent a l'ARBRES-X. Pel que fa al sensor RISKSAR-X, s'han desenvolupat diverses contribucions hardware durant part d'aquest doctorat amb l'objectiu de millorar el rendiment del sistema. En dotar el sistema de la possibilitat d'operar en el mode d'adquisició totalment polarimètric OtF, s'ha reduït el relatiu llarg temps d'escaneig. Això és de gran interès ja que els blancs mesurats que presenten una reflectivitat variable a curt termini, com ara la vegetació en moviment, poden degradar els paràmetres extrets de les dades recuperades i la reconstrucció d'imatges SAR. Durant aquesta activitat doctoral s'ha estudiat el desenfocat de la imatge, la decorrelació i la degradació de la coherència introduïts per aquest efecte. A més, s'ha introduït un nou terme en la coherència interferomètrica diferencial que té en compte el desenfocat de la imatge. Pel que fa al sistema ARBRES-X, un dels principals objectius perseguits durant aquest doctorat ha estat la integració del sensor en un petit UAV MP superant les restriccions de pes, grandària i aerodinàmica de la plataforma. S'espera que l'ús d'aquest tipus de plataformes obri noves possibilitats en la detecció remota SAR aerotransportada, ja que ofereix molta més versatilitat que els UAV d'ales fixes habituals. S'han avaluat diferents estratègies de vol innovadores amb aquest tipus de plataformes i s'han obtingut resultats preliminars amb l'ús del sistema ARBRES-X. Durant el transcurs del present treball, s'ha dedicat molt esforç a assolir els primers resultats experimentals d'interferometria de múltiple passada obtinguts amb l'UAV MP conjuntament amb l'ARBRES-X. A més, el sensor ha estat dotat de capacitats totalment polarimètriques aplicant les millores desenvolupades al radar RISKSAR-X, el qual constitueix un altre exemple de la dualitat entre ambdós sistemes. Finalment, s'han realitzat amb èxit una apertura vertical i semicircular obtenint imatges SLC de l'escenari, el qual permet preveure la capacitat de l'UAV MP per a realitzar imatges tomogràfiques i apertures circulars completes en el futur. En conclusió, l'UAV MP és una plataforma prometedora que obre nous potencials per a diverses aplicacions, com ara la interferometria de múltiple passada o la tomografia diferencial amb la realització de trajectòries gairebé arbitràries.Postprint (published version
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