Recent Advances in Antenna Design for 5G Heterogeneous Networks

The aim of this book is to highlight up to date exploited technologies and approaches in terms of antenna designs and requirements. In this regard, this book targets a broad range of subjects, including the microstrip antenna and the dipole and printed monopole antenna. The varieties of antenna designs, along with several different approaches to improve their overall performance, have given this book a great value, in which makes this book is deemed as a good reference for practicing engineers and under/postgraduate students working in this field. The key technology trends in antenna design as part of the mobile communication evolution have mainly focused on multiband, wideband, and MIMO antennas, and all have been clearly presented, studied and implemented within this book. The forthcoming 5G systems consider a truly mobile multimedia platform that constitutes a converged networking arena that not only includes legacy heterogeneous mobile networks but advanced radio interfaces and the possibility to operate at mm wave frequencies to capitalize on the large swathes of available bandwidth. This provides the impetus for a new breed of antenna design that, in principle, should be multimode in nature, energy efficient, and, above all, able to operate at the mm wave band, placing new design drivers on the antenna design. Thus, this book proposes to investigate advanced 5G antennas for heterogeneous applications that can operate in the range of 5G spectrums and to meet the essential requirements of 5G systems such as low latency, large bandwidth, and high gains and efficiencies

A compact high-energy particle detector for low-cost deep space missions

Over the last few decades particle physics has led to many new discoveries, laying the foundation for modern science. However, there are still many unanswered questions which the next generation of particle detectors could address, potentially expanding our knowledge and understanding of the Universe. Owing to recent technological advancements, electronic sensors are now able to acquire measurements previously unobtainable, creating opportunities for new deep-space high-energy particle missions. Consequently, a new compact instrument was developed capable of detecting gamma rays, neutrons and charged particles. This instrument combines the latest in FPGA System-on-Chip technology as the central processor and a 3x3 array of silicon photomultipliers coupled with an organic plastic scintillator as the detector. Using modern digital pulse shape discrimination and signal processing techniques, the scintillator and photomultiplier combination has been shown to accurately discriminate between the di_erent particle types and provide information such as total energy and incident direction. The instrument demonstrated the ability to capture 30,000 particle events per second across 9 channels - around 15 times that of the U.S. based CLAS detector. Furthermore, the input signals are simultaneously sampled at a maximum rate of 5 GSPS across all channels with 14-bit resolution. Future developments will include FPGA-implemented digital signal processing as well as hardware design for small satellite based deep-space missions that can overcome radiation vulnerability

The Development of Novel Interconnection Technologies for 3D Packaging of Wire Bondless Silicon Carbide Power Modules

This dissertation advances the cause for the 3D packaging and integration of silicon carbide power modules. 3D wire bondless approaches adopted for enhancing the performance of silicon power modules were surveyed, and their merits were assessed to serve as a vision for the future of SiC power packaging. Current efforts pursuing 3D wire bondless SiC power modules were investigated, and the concept for a novel SiC power module was discussed. This highly-integrated SiC power module was assessed for feasibility, with a focus on achieving ultralow parasitic inductances in the critical switching loops. This will enable higher switching frequencies, leading to a reduction in the size of the passive devices in the system and resulting in systems with lower weight and volume. The proposed concept yielded an order-of-magnitude reduction in system parasitics, alongside the possibility of a compact system integration. The technological barriers to realizing these concepts were identified, and solutions for novel interconnection schemes were proposed and evaluated. A novel sintered silver preform was developed to facilitate flip-chip interconnections for a bare-die power device while operating in a high ambient temperature. The preform was demonstrated to have 3.75× more bonding strength than a conventional sintered silver bond and passed rigorous thermal shock tests. A chip-scale and flip-chip capable power device was also developed. The novel package combined the ease of assembly of a discrete device with a performance exceeding a wire bonded module. It occupied a 14× smaller footprint than a discrete device, and offered power loop inductances which were less than a third of a conventional wire bonded module. A detailed manufacturing process flow and qualification is included in this dissertation. These novel devices were implemented in various electrical systems—a discrete Schottky barrier diode package, a half-bridge module with external gate drive, and finally a half-bridge with integrated gate driver in-module. The results of these investigations have been reported and their benefits assessed. The wire bondless modules showed \u3c 5% overshoot under all test conditions. No observable detrimental effects due to dv/dt were observed for any of the modules even under aggressive voltage slew rates of 20-25 V/ns

Micro/Nano Structures and Systems

Micro/Nano Structures and Systems: Analysis, Design, Manufacturing, and Reliability is a comprehensive guide that explores the various aspects of micro- and nanostructures and systems. From analysis and design to manufacturing and reliability, this reprint provides a thorough understanding of the latest methods and techniques used in the field. With an emphasis on modern computational and analytical methods and their integration with experimental techniques, this reprint is an invaluable resource for researchers and engineers working in the field of micro- and nanosystems, including micromachines, additive manufacturing at the microscale, micro/nano-electromechanical systems, and more. Written by leading experts in the field, this reprint offers a complete understanding of the physical and mechanical behavior of micro- and nanostructures, making it an essential reference for professionals in this field

Silicon - polymer hybrid integrated microwave photonic devices for optical interconnects and electromagnetic wave detection

textThe accelerating increase in information traffic demands the expansion of optical access network systems that require high-performance optical and photonic components. In short-range communication links, optical interconnects have been widely accepted as a viable approach to solve the problems that copper based electrical interconnects have encountered in keeping up with the surge in the data rate demand over the last decades. Low cost, ease of fabrication, and integration capabilities of low optical-loss polymers make them attractive for integrated photonic applications to support futuristic data communication networks. In addition to passive wave-guiding components, electro-optic (EO) polymers consisting of a polymeric matrix doped with organic nonlinear chromophores have enabled wide-RF-bandwidth and low-power active photonic devices. Beside board level passive and active optical components, on-chip micro- or nano-photonic devices have been made possible by the hybrid integration of EO polymers onto the silicon platform. In recent years, silicon photonics have attracted a significant amount of attentions, because it offers compact device size and the potential of complementary metal–oxide–semiconductor (CMOS) compatible photonic integrated circuits. The combination of silicon photonics and EO polymers can enable miniaturized and high-performance hybrid integrated photonic devices, such as electro-optic modulators, optical interconnects, and microwave photonic sensors. Silicon photonic crystal waveguides (PCWs) exhibit slow-light effects which are beneficial for device miniaturization. Especially, EO polymer filled silicon slotted PCWs further reduce the device size and enhance the device performance by combining the best of these two systems. The potential applications of these silicon-polymer hybrid integrated devices include not only optical interconnects, but also optical sensing and microwave photonics. In this dissertation, the design, fabrication, and characterization of several types of silicon-polymer hybrid photonic devices will be presented, including EO polymer filled silicon PCW modulators for on-chip optical interconnects, antenna-coupled optical modulators for electromagnetic wave detections, and low-loss strip-to-slot PCW mode converters. In addition, some polymer-based devices and silicon-based photonic devices will also be presented, such as traveling wave electro-optic polymer modulators based on domain-inversion directional couplers, and silicon thermo-optic switches based on coupled photonic crystal microcavities. Furthermore, some microwave (or RF) components such as integrated broadband bowtie antennas for microwave photonic applications will be covered. Some on-going work or suggested future work will also be introduced, including in-device pyroelectric poling for EO polymer filled silicon slot PCWs, millimeter- or Terahertz-wave sensors based on EO polymer filled plasmonic slot waveguide, low-loss silicon-polymer hybrid slot photonic crystal waveguides fabricated by CMOS foundry, logic devices based on EO polymer microring resonators, and so on.Electrical and Computer Engineerin

Advanced GaN HEMTs for high performance microwave power amplifiers

The ever increasing demand for high power levels at higher frequencies from the industry has stimulated extensive research in gallium nitride (GaN) transistor technology over the past two decades. This has led to significant advances of the technology, but the degradation in the device performance due to device self-heating and trap generation in the device epilayers during device operation is still a major challenge with the current GaN high electron mobility transistor (HEMT) technology. This thesis focuses on minimising device self-heating effects by means of efficient heat distribution within the device. Two approaches are analysed in this work. Firstly, the impact on the device DC performance of improved wafer growth conditions by using method called hot-wall MOCVD (metal organic chemical vapour deposition) are investigated. It was found that 2 µm × 100 µm devices on this wafer exhibit only 4% degradation in the saturated output current density at 20 V compared with 13% for devices fabricated on a wafer grown by standard MOCVD growth. This improved performance was attributed to lower thermal boundary resistance achieved by improved growth quality of the epitaxial material layers. In the second approach, the impact on self-heating was investigated through the use of a distributed device channel, i.e. introducing inactive regions along the device channel to distribute the hot spots in the device. Here a planar isolation method was used to achieve planar distributed gate devices that led to low leakage currents below 200 nA/mm at gate voltage of -20 V. A decrease in the peak channel temperature of 30°C was found through thermal simulations over a single 100 µm wide gate finger. Moreover, these distributed channel devices with gate periphery of 10 ×100 µm showed 13 % higher saturated current density than standard devices with the same active device area. The other major issue addressed in this thesis is the so-called current collapse which is a degradation in the output current caused by electron trapping in the device structure. An alternative solution to the conventionally used dielectric passivation is proposed and it entails the use of a thick undoped GaN cap layer to reduce the surface effects by moving the surface further away from the device channel. Drain lag measurements show 15% and 35% decrease in the current at quiescent bias decrease points of [-7 V; 10 V] and [-7 V; 20 V] respectively for the proposed structure compared with 80% decrease and complete current collapse at these quiescent bias points in the same geometry devices on a standard wafer with 2 nm GaN cap layer and a thin 10 nm thin SiNx passivation, respectively. The 10 nm thin passivation layer does not minimise the surface effects, but it protects the devices from oxidation. Finally, a single stage class A amplifier was demonstrated using the developed technology exhibiting peak output power of 30 dBm at 10 GHz and associated power added efficiency of 44% and gain of 10 dB. Also, gain of at least 9.4 dB was shown over 8-13 GHz bandwidth

Modeling EMI Resulting from a Signal Via Transition Through Power/Ground Layers

Signal transitioning through layers on vias are very common in multi-layer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current must switch from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in noise on the power bus that can lead to signal integrity, as well as EMI problems. Numerical methods, such as the finite-difference time-domain (FDTD), Moment of Methods (MoM), and partial element equivalent circuit (PEEC) method, were employed herein to study this problem. The modeled results are supported by measurements. In addition, a common EMI mitigation approach of adding a decoupling capacitor was investigated with the FDTD method