Design of Ultrafast All-Optical Pseudo Binary Random Sequence Generator, 4-bit Multiplier and Divider using 2 x 2 Silicon Micro-ring Resonators

All-optical devices are essential for next generation ultrafast, ultralow-power and ultrahigh bandwidth information processing systems. Silicon microring resonators (SiMRR) provide a versatile platform for all-optical switching and CMOS-compatible computing, with added advantages of high Q-factor, tunability, compactness, cascadability and scalability. A detailed theoretical analysis of ultrafast all-optical switching 2 x 2 SiMRRs has been carried out incorporating the effects of two photon absorption induced free-carrier injection and thermo optic effect. The results have been used to design simple and compact all-optical 3-bit and 4-bit pseudo-random binary sequence generators and the first reported designs of all-optical 4 x 4-bit multiplier and divider. The designs have been optimized for low-power, ultrafast operation with high modulation depth, enabling logic operations at 45 Gbps.Comment: 13 pages, 4 figures. Submitted at Journal (Optik) for publicatio

Millimeter-wave Communication and Radar Sensing — Opportunities, Challenges, and Solutions

With the development of communication and radar sensing technology, people are able to seek for a more convenient life and better experiences. The fifth generation (5G) mobile network provides high speed communication and internet services with a data rate up to several gigabit per second (Gbps). In addition, 5G offers great opportunities of emerging applications, for example, manufacture automation with the help of precise wireless sensing. For future communication and sensing systems, increasing capacity and accuracy is desired, which can be realized at millimeter-wave spectrum from 30 GHz to 300 GHz with several tens of GHz available bandwidth. Wavelength reduces at higher frequency, this implies more compact transceivers and antennas, and high sensing accuracy and imaging resolution. Challenges arise with these application opportunities when it comes to realizing prototype or demonstrators in practice. This thesis proposes some of the solutions addressing such challenges in a laboratory environment.High data rate millimeter-wave transmission experiments have been demonstrated with the help of advanced instrumentations. These demonstrations show the potential of transceiver chipsets. On the other hand, the real-time communication demonstrations are limited to either low modulation order signals or low symbol rate transmissions. The reason for that is the lack of commercially available high-speed analog-to-digital converters (ADCs); therefore, conventional digital synchronization methods are difficult to implement in real-time systems at very high data rates. In this thesis, two synchronous baseband receivers are proposed with carrier recovery subsystems which only require low-speed ADCs [A][B].Besides synchronization, high-frequency signal generation is also a challenge in millimeter-wave communications. The frequency divider is a critical component of a millimeter-wave frequency synthesizer. Having both wide locking range and high working frequencies is a challenge. In this thesis, a tunable delay gated ring oscillator topology is proposed for dual-mode operation and bandwidth extension [C]. Millimeter-wave radar offers advantages for high accuracy sensing. Traditional millimeter-wave radar with frequency-modulated continuous-wave (FMCW), or continuous-wave (CW), all have their disadvantages. Typically, the FMCW radar cannot share the spectrum with other FMCW radars.\ua0 With limited bandwidth, the number of FMCW radars that could coexist in the same area is limited. CW radars have a limited ambiguous distance of a wavelength. In this thesis, a phase-modulated radar with micrometer accuracy is presented [D]. It is applicable in a multi-radar scenario without occupying more bandwidth, and its ambiguous distance is also much larger than the CW radar. Orthogonal frequency-division multiplexing (OFDM) radar has similar properties. However, its traditional fast calculation method, fast Fourier transform (FFT), limits its measurement accuracy. In this thesis, an accuracy enhancement technique is introduced to increase the measurement accuracy up to the micrometer level [E]

Next Generation Silicon Photonic Transceiver: From Device Innovation to System Analysis

Silicon photonics is recognized as a disruptive technology that has the potential to reshape many application areas, for example, data center communication, telecommunications, high-performance computing, and sensing. The key capability that silicon photonics offers is to leverage CMOS-style design, fabrication, and test infrastructure to build compact, energy-efficient, and high-performance integrated photonic systems-on- chip at low cost. As the need to squeeze more data into a given bandwidth and a given footprint increases, silicon photonics becomes more and more promising. This work develops and demonstrates novel devices, methodologies, and architectures to resolve the challenges facing the next-generation silicon photonic transceivers. The first part of this thesis focuses on the topology optimization of passive silicon photonic devices. Specifically, a novel device optimization methodology - particle swarm optimization in conjunction with 3D finite-difference time-domain (FDTD), has been proposed and proven to be an effective way to design a wide range of passive silicon photonic devices. We demonstrate a polarization rotator and a 90◦ optical hybrid for polarization-diversity and phase-diversity communications - two important schemes to increase the communication capacity by increasing the spectral efficiency. The second part of this thesis focuses on the design and characterization of the next- generation silicon photonic transceivers. We demonstrate a polarization-insensitive WDM receiver with an aggregate data rate of 160 Gb/s. This receiver adopts a novel architecture which effectively reduces the polarization-dependent loss. In addition, we demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm in the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling to the silicon chip. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. We also demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. The last part of this thesis focuses on the chip-scale optical interconnect and presents two different types of reconfigurable memory interconnects for multi-core many-memory computing systems. These reconfigurable interconnects can effectively alleviate the memory access issues, such as non-uniform memory access, and Network-on-Chip (NoC) hot-spots that plague the many-memory computing systems by dynamically directing the available memory bandwidth to the required memory interface

RF to Millimeter-wave Linear Power Amplifiers in Nanoscale CMOS SOI Technology

The low manufacturing cost, integration capability with baseband and digital circuits, and high operating frequency of nanoscale CMOS technologies have propelled their applications into RF and microwave systems. Implementing fully-integrated RF to millimeter-wave (mm-wave) CMOS power amplifiers (PAs), nevertheless, remains challenging due to the low breakdown voltages of CMOS transistors and the loss from on-chip matching networks. These limitations have reduced the design space of CMOS power amplifiers to narrow-band, low linearity metrics often with insufficient gain, output power, and efficiency. A new topology for implementing power amplifiers based on stacking of CMOS SOI transistors is proposed. The input RF power is coupled to the transistors using on-chip transformers, while the gate terminal of teach transistor is dynamically biased from the output node. The output voltages of the stacked transistors are added constructively to increase the total output voltage swing and output power. Moreover, the stack configuration increases the optimum load impedance of the PA to values close to 50 ohm, leading to power, efficiency and bandwidth enhancements. Practical design issues such as limitation in the number of stacked transistors, gate oxide breakdown, stability, effect of parasitic capacitances on the performance of the PA and large chip areas have also been addressed. Fully-integrated RF to mm-wave frequency CMOS SOI PAs are successfully implemented and measured using the proposed topology

Superconductor digital electronics: scalability and energy efficiency issues (Review Article)

Superconductor digital electronics using Josephson junctions as ultrafast switches and magnetic-flux encoding of information was proposed over 30 years ago as a sub-terahertz clock frequency alternative to semiconductor electronics based on complementary metal-oxide-semiconductor (CMOS) transistors. Recently, interest in developing superconductor electronics has been renewed due to a search for energy saving solutions in applications related to high-performance computing. The current state of superconductor electronics and fabrication processes are reviewed in order to evaluate whether this electronics is scalable to a very large scale integration (VLSI) required to achieve computation complexities comparable to CMOS processors. A fully planarized process at MIT Lincoln Laboratory, perhaps the most advanced process developed so far for superconductor electronics, is used as an example. The process has nine superconducting layers: eight Nb wiring layers with the minimum feature size of 350 nm, and a thin superconducting layer for making compact high-kinetic-inductance bias inductors. All circuit layers are fully planarized using chemical mechanical planarization (CMP) of SiO₂ interlayer dielectric. The physical limitations imposed on the circuit density by Josephson junctions, circuit inductors, shunt and bias resistors, etc., are discussed. Energy dissipation in superconducting circuits is also reviewed in order to estimate whether this technology, which requires cryogenic refrigeration, can be energy efficient. Fabrication process development required for increasing the density of superconductor digital circuits by a factor of ten and achieving densities above 10⁷ Josephson junctions per cm² is described

Silicon Photonic Modulators for Low-power Applications

In this book, silicon photonic integrated circuits are combined with electro-optic organic materials for realizing energy-efficient modulators with unprecedented performance. These silicon-organic hybrid Mach-Zehnder modulators feature a compact size, sub-Volt drive voltages, and they support data rates up to 84 Gbit/s. In addition, a wet chemical waveguide fabrication scheme and an efficient fiber-chip coupling scheme are presented

Silicon-Based Terahertz Circuits and Systems

The Terahertz frequency range, often referred to as the `Terahertz' gap, lies wedged between microwave at the lower end and infrared at the higher end of the spectrum, occupying frequencies between 0.3-3.0 THz. For a long time, applications in THz frequencies had been limited to astronomy and chemical sciences, but with advancement in THz technology in recent years, it has shown great promise in a wide range of applications ranging from disease diagnostics, non-invasive early skin cancer detection, label-free DNA sequencing to security screening for concealed weapons and contraband detection, global environmental monitoring, nondestructive quality control and ultra-fast wireless communication. Up until recently, the terahertz frequency range has been mostly addressed by high mobility compound III-V processes, expensive nonlinear optics, or cryogenically cooled quantum cascade lasers. A low cost, room temperature alternative can enable the development of such a wide array of applications, not currently accessible due to cost and size limitations. In this thesis, we will discuss our approach towards development of integrated terahertz technology in silicon-based processes. In the spirit of academic research, we will address frequencies close to 0.3 THz as 'Terahertz'. In this thesis, we address both fronts of integrated THz systems in silicon: THz power generation, radiation and transmitter systems, and THz signal detection and receiver systems. THz power generation in silicon-based integrated circuit technology is challenging due to lower carrier mobility, lower cut-o frequencies compared to compound III-V processes, lower breakdown voltages and lossy passives. Radiation from silicon chip is also challenging due to lossy substrates and high dielectric constant of silicon. In this work, we propose novel ways of combining circuit and electromagnetic techniques in a holistic design approach, which can overcome limitations of conventional block-by-block or partitioned design methodology, in order to generate high-frequency signals above the classical definition of cut-off frequencies (ƒt/ƒmax). We demonstrate this design philosophy in an active electromagnetic structure, which we call Distributed Active Radiator. It is inspired by an Inverse Maxwellian approach, where instead of using classical circuit and electromagnetic blocks to generate and radiate THz frequencies, we formulate surface (metal) currents in silicon chip for a desired THz field prole and develop active means of controlling different harmonic currents to perform signal generation, frequency multiplication, radiation and lossless filtering, simultaneously in a compact footprint. By removing the articial boundaries between circuits, electromagnetics and antenna, we open ourselves to a broader design space. This enabled us to demonstrate the rst 1 mW Eective-isotropic-radiated-power(EIRP) THz (0.29 THz) source in CMOS with total radiated power being three orders of magnitude more than previously demonstrated. We also proposed a near-field synchronization mechanism, which is a scalable method of realizing large arrays of synchronized autonomous radiating sources in silicon. We also demonstrate the first THz CMOS array with digitally controlled beam-scanning in 2D space with radiated output EIRP of nearly 10 mW at 0.28 THz. On the receiver side, we use a similar electronics and electromagnetics co-design approach to realize a 4x4 pixel integrated silicon Terahertz camera demonstrating to the best of our knowledge, the most sensitive silicon THz detector array without using post-processing, silicon lens or high-resistivity substrate options (NEP &lt; 10 pW &#8730; Hz at 0.26 THz). We put the 16 pixel silicon THz camera together with the CMOS DAR THz power generation arrays and demonstrated, for the first time, an all silicon THz imaging system with a CMOS source.</p