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Near-Zero-Power Temperature Sensing via Tunneling Currents Through Complementary Metal-Oxide-Semiconductor Transistors.
Temperature sensors are routinely found in devices used to monitor the environment, the human body, industrial equipment, and beyond. In many such applications, the energy available from batteries or the power available from energy harvesters is extremely limited due to limited available volume, and thus the power consumption of sensing should be minimized in order to maximize operational lifetime. Here we present a new method to transduce and digitize temperature at very low power levels. Specifically, two pA current references are generated via small tunneling-current metal-oxide-semiconductor field effect transistors (MOSFETs) that are independent and proportional to temperature, respectively, which are then used to charge digitally-controllable banks of metal-insulator-metal (MIM) capacitors that, via a discrete-time feedback loop that equalizes charging time, digitize temperature directly. The proposed temperature sensor was integrated into a silicon microchip and occupied 0.15âmm2 of area. Four tested microchips were measured to consume only 113âpW with a resolution of 0.21â°C and an inaccuracy of ±1.65â°C, which represents a 628Ă reduction in power compared to prior-art without a significant reduction in performance
An Ultra-Low-Power Oscillator with Temperature and Process Compensation for UHF RFID Transponder
This paper presents a 1.28MHz ultra-low-power oscillator with temperature and process compensation. It is very suitable for clock generation circuits used in ultra-high-frequency (UHF) radio-frequency identification (RFID) transponders. Detailed analysis of the oscillator design, including process and temperature compensation techniques are discussed. The circuit is designed using TSMC 0.18ÎŒm standard CMOS process and simulated with Spectre. Simulation results show that, without post-fabrication calibration or off-chip components, less than ±3% frequency variation is obtained from â40 to 85°C in three different process corners. Monte Carlo simulations have also been performed, and demonstrate a 3Ï deviation of about 6%. The power for the proposed circuitry is only 1.18”W at 27°C
DTMOS-Based 0.4V Ultra Low-Voltage Low-Power VDTA Design and Its Application to EEG Data Processing
In this paper, an ultra low-voltage, ultra low-power voltage differencing transconductance amplifier (VDTA) is proposed. DTMOS (Dynamic Threshold Voltage MOS) transistors are employed in the design to effectively use the ultra low supply voltage. The proposed VDTA is composed of two operational transconductance amplifiers operating in the subthreshold region. Using TSMC 0.18”m process technology parameters with symmetric ±0.2V supply voltage, the total power consumption of the VDTA block is found as just 5.96 nW when the transconductances have 3.3 kHz, 3 dB bandwidth. The proposed VDTA circuit is then used in a fourth-order double-tuned band-pass filter for processing real EEG data measurements. The filter achieves close to 64 dB dynamic range at 2% THD with a total power consumption of 12.7 nW
Variation Resilient Adaptive Controller for Subthreshold Circuits
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for power-limited applications. For this design technique to gain widespread adoption, one of the most pressing concerns is how to improve the robustness of subthreshold logic to process and temperature variations. We propose a variation resilient adaptive controller for subthreshold circuits with the following novel features: new sensor based on time-to-digital converter for capturing the variations accurately as digital signatures, and an all-digital DC-DC converter incorporating the sensor capable of generating an operating operating Vdd from 0V to 1.2V with a resolution of 18.75mV, suitable for subthreshold circuit operation. The benefits of the proposed controller is reflected with energy improvement of up to 55% compared to when no controller is employed. The detailed implementation and validation of the proposed controller is discussed
Spin-Based Neuron Model with Domain Wall Magnets as Synapse
We present artificial neural network design using spin devices that achieves
ultra low voltage operation, low power consumption, high speed, and high
integration density. We employ spin torque switched nano-magnets for modelling
neuron and domain wall magnets for compact, programmable synapses. The spin
based neuron-synapse units operate locally at ultra low supply voltage of 30mV
resulting in low computation power. CMOS based inter-neuron communication is
employed to realize network-level functionality. We corroborate circuit
operation with physics based models developed for the spin devices. Simulation
results for character recognition as a benchmark application shows 95% lower
power consumption as compared to 45nm CMOS design
Silicon Pixel R&D for the CLIC Tracking Detector
The physics aims at the proposed high-energy collider CLIC pose
challenging demands on the performance of the detector system. Precise hit-time
tagging, an excellent spatial resolutions, and a low mass are required for the
vertex and tracking detectors. To meet these requirements, an all-silicon
vertex and tracking detector system is foreseen, for which a broad R&D
programme on a variety of novel silicon detector technologies is being pursued.
For the ultra-low mass vertex detector, different hybrid technologies with
innovative sensor concepts and interconnection techniques are explored. For the
large-scale tracking detector, the focus of the R&D lies on monolithic HV-MAPS
and HR-CMOS technologies. This contribution gives an overview of the ongoing
activities with a focus on monolithic technologies for the CLIC tracking
detector. Recent results from laboratory and test-beam measurement campaigns of
the ATLASpix_Simple and the CLICTD sensor prototypes are presented.Comment: Proceedings for INSTR20, 10 pages, 9 figure
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