Reliability Enhancing Control Algorithms for Two-Stage Grid-Tied Inverters

In the photovoltaic (PV) generation system, two types of grid-tied inverter systems are usually deployed: the single-stage grid-tied inverter system and the two-stage grid-tied inverter system. In the single-stage grid-tied inverter system, the input of the inverter is directly connected to the PV arrays, while an additional dc-dc stage is inserted between the PV arrays and the dc-ac inverter in the two-stage design. The additional dc-dc stage could provide a stable dc-link voltage to the inverter, which also enables new design possibilities, including the multi-MPPT operation and solar-plus-storage application. Thus, the two-stage grid-tied inverter has been widely used in the PV generation system.As the core component of the PV generation system, the reliability of the grid-tied inverter determines the overall robustness of the system. The two-stage grid-tied inverter system includes three parts: the dc-dc stage, dc-link capacitor, and dc-ac inverter. Thus, the reliability of the two-stage grid-tied inverter relies on the reliability of each part. The dc-dc stage is used to provide a stable dc-link voltage to the inverter. However, when the inverter stage provides constant power to the grid, the load of the dc-dc stage becomes the constant power load (CPL), which will deteriorate the stability of the dc-dc stage. The dc-link capacitor is used to attenuate the voltage ripple on the dc-link and balance the transient power mismatch between the dc-dc stage and the dc-ac stage. However, during the operation of the inverter system, the degradation of the capacitor will reduce the converter reliability, and even result in system failure. The inverter stage is connected to the grid through the output filter, and the LCL type filter has been commonly used due to its superior performance. The resonance of the LCL filter must be properly damped to enhance the inverter stability. However, the grid-side impedance will lead to the resonant frequency drifting of the LCL filter, which will worsen the stability margin of the inverter. Thus, the control design of the two-stage grid-tied inverter system must consider those reliability challenges. In this work, three control algorithms are proposed to solve the reliability challenges. For the dc-dc stage, an uncertainty and disturbance estimator (UDE) based robust voltage control scheme is proposed. The proposed voltage control scheme can actively estimate and compensate for the disturbance of the dc-dc stage. Both the disturbance rejection performance and the stability margin of the dc-dc stage, especially under the CPL, could be enhanced. For the dc-link capacitor, a high-frequency (HF) signal injection based capacitance estimation scheme is proposed. The proposed estimation scheme can monitor the actual dc-link capacitance in real-time. For the inverter stage, an adaptive extremum seeking control (AESC) based LCL filter resonant frequency estimation scheme is proposed. The AESC-based estimation scheme can estimate the resonant frequency of the LCL filter online. All the proposed reliability enhancing control algorithms could enhance the reliability of the two-stage grid-tied inverter system. Detailed theoretical analysis, simulation studies, and comprehensive experimental studies have been performed to validate the effectiveness

Reliability Enhancing Control Algorithms for Two-Stage Grid-Tied Inverters

In the photovoltaic (PV) generation system, two types of grid-tied inverter systems are usually deployed: the single-stage grid-tied inverter system and the two-stage grid-tied inverter system. In the single-stage grid-tied inverter system, the input of the inverter is directly connected to the PV arrays, while an additional dc-dc stage is inserted between the PV arrays and the dc-ac inverter in the two-stage design. The additional dc-dc stage could provide a stable dc-link voltage to the inverter, which also enables new design possibilities, including the multi-MPPT operation and solar-plus-storage application. Thus, the two-stage grid-tied inverter has been widely used in the PV generation system.As the core component of the PV generation system, the reliability of the grid-tied inverter determines the overall robustness of the system. The two-stage grid-tied inverter system includes three parts: the dc-dc stage, dc-link capacitor, and dc-ac inverter. Thus, the reliability of the two-stage grid-tied inverter relies on the reliability of each part. The dc-dc stage is used to provide a stable dc-link voltage to the inverter. However, when the inverter stage provides constant power to the grid, the load of the dc-dc stage becomes the constant power load (CPL), which will deteriorate the stability of the dc-dc stage. The dc-link capacitor is used to attenuate the voltage ripple on the dc-link and balance the transient power mismatch between the dc-dc stage and the dc-ac stage. However, during the operation of the inverter system, the degradation of the capacitor will reduce the converter reliability, and even result in system failure. The inverter stage is connected to the grid through the output filter, and the LCL type filter has been commonly used due to its superior performance. The resonance of the LCL filter must be properly damped to enhance the inverter stability. However, the grid-side impedance will lead to the resonant frequency drifting of the LCL filter, which will worsen the stability margin of the inverter. Thus, the control design of the two-stage grid-tied inverter system must consider those reliability challenges. In this work, three control algorithms are proposed to solve the reliability challenges. For the dc-dc stage, an uncertainty and disturbance estimator (UDE) based robust voltage control scheme is proposed. The proposed voltage control scheme can actively estimate and compensate for the disturbance of the dc-dc stage. Both the disturbance rejection performance and the stability margin of the dc-dc stage, especially under the CPL, could be enhanced. For the dc-link capacitor, a high-frequency (HF) signal injection based capacitance estimation scheme is proposed. The proposed estimation scheme can monitor the actual dc-link capacitance in real-time. For the inverter stage, an adaptive extremum seeking control (AESC) based LCL filter resonant frequency estimation scheme is proposed. The AESC-based estimation scheme can estimate the resonant frequency of the LCL filter online. All the proposed reliability enhancing control algorithms could enhance the reliability of the two-stage grid-tied inverter system. Detailed theoretical analysis, simulation studies, and comprehensive experimental studies have been performed to validate the effectiveness

Study on Voltage Controlling Techniques In Grid Connected PV System

The energy is the very important parameter for survival or today’s growth we can transfer the energy from one form to other. The mainly wind and solar energies are the most available among other renewable energy sources in all over the world. In the present years, because of the rapid advances of power electronic systems the production of electricity from wind and photovoltaic energy sources have increased significantly. This paper proposed hybrid system is using of controlling power

UDE-based controller equipped with a multiple-time-delayed filter to improve the voltage quality of inverters

In this paper, a two-degrees-of-freedom control algorithm based on uncertainty and disturbance estimator (UDE), aimed to minimize the total harmonic distortion of inverter output voltage is proposed, possessing enhanced robustness to base frequency variations. A multiple-time-delay action is combined with a commonly utilized low-pass UDE filter to increase the range of output impedance magnitude minimization around odd multiples of base frequency for enhanced rejection of typical single-phase nonlinear loads harmonics. Marginal robustness improvement achieved by increasing the number of time delays is quantified analytically and revealed to be independent of delay order. The performance of the proposed control approach and its superiority over two recently proposed methods is validated successfully by experimental results

Uncertainty and disturbance estimator design to shape and reduce the output impedance of inverter

Power inverters are becoming more and more common in the modern grid. Due to their switching nature, a passive filter is installed at the inverter output. This generates high output impedance which limits the inverter ability to maintain high power quality at the inverter output. This thesis deals with an impedance shaping approach to the design of power inverter control. The Uncertainty and Disturbance Estimator (UDE) is proposed as a candidate for direct formation of the inverter output impedance. The selection of UDE is motivated by the desire for the disturbance rejection control and the tracking controller to be decoupled. It is demonstrated in the thesis that due to this fact the UDE filter design directly influences the inverter output impedance and the reference model determines the inverter internal electromotive force. It was recently shown in the literature and further emphasized in this thesis that the classic low pass frequency design of the UDE cannot estimate periodical disturbances under the constraint of finite control bandwidth. Since for a power inverter both the reference signal and the disturbance signal are of periodical nature, the classic UDE lowpass filter design does not give optimal results. A new design approach is therefore needed. The thesis develops four novel designs of the UDE filter to significantly reduce the inverter output impedance and maintain low Total Harmonic Distortion (THD) of the inverter output voltage. The first design is the based on a frequency selective filter. This filter design shows superiority in both observing and rejecting periodical disturbances over the classic low pass filter design. The second design uses a multi-band stop design to reject periodical disturbances with some uncertainty in the frequency. The third solution uses a classic low pass filter design combined with a time delay to match zero phase estimation of the disturbance at the relevant spectrum. Furthermore, this solution is combined with a resonant tracking controller to reduce the tracking steady-state error in the output voltage. The fourth solution utilizes a low-pass filter combined with multiple delays to increase the frequency robustness. This method shows superior performance over the multi-band-stop and the time delayed filter in steady-state. All the proposed methods are validated through extensive simulation and experimental results

Design of a UDE Frequency Selective Filter to Reject Periodical Disturbances

In this paper a new filter design for the Uncertainty and Disturbance Estimator (UDE) is proposed to reject periodical disturbances when a limited bandwidth is required for the control output. The motivation comes from several applications where the system actuator may introduce a bandwidth limitation, as a result of internal delays, or when the actuator itself is a limited bandwidth closed-loop system. When the traditional UDE approach is applied in these systems, the stability requirements impose a limitation over the effective bandwidth of the UDE filter and therefore disturbances cannot be fully rejected by the filter. In the case where the expected disturbance is periodical with a known fundamental frequency, the proposed UDE filter is designed as a chain of filters to match selected bands of the expected disturbance spectrum and fully reject them while maintaining the desired stability margins. A design example of a power inverter application is investigated and extensive simulation results are provided to verify the proposed UDE filter design

System uncertainties estimation based adaptive robust backstepping control for DC DC buck converter

This paper proposed a novel adaptive robust backstepping control scheme for DC-DC buck converter subjected to external disturbance and system uncertainty. Uncertainty in the load resistance and the input voltage represent the big challenge in buck converter control. In this work, an adaptive estimator for matched and mismatched uncertainties based backstepping control is applied for DC-DC buck converter. The updating laws are determined based on the lyapunov theorem. Thus, the difference between the estimated parameters and actual parameters converges to zero. The proposed control method is compared with the conventional sliding mode control and integral sliding mode control. Simulation results demonstrate the effectiveness and robustness of the proposed controller

Modeling and Nonlinear Control of dc–dc Converters for Microgrid Applications

This paper proposes a high-performance control strategy for dc–dc converters supplying combined loads (constant current/power, and/or linear loads). This strategy combines a feedback law with a feedforward compensation. The feedback law is based on full feedback linearization, which guarantees that zero dynamics are avoided. To design a single controller for the three basic converter topologies (i.e., buck, boost and buck–boost), a unified model for these converters is introduced. From the resulting combined control law, the specific control law for each type of converter can be obtained by setting three constant coefficient to 0 or 1. The feedforward compensation is based on the estimated values of the load obtained via a nonlinear observer. The main advantage of this unified approach is that it is implemented by using a single algorithm which can be executed in a dedicated hardware, for instance, a single integrated circuit, providing a unified solution for the control of the mentioned topologies. The good performance of the proposed scheme is verified through simulations and tested via experimental application cases, concluding that this is a good unified solution to control dc–dc converters used in microgrid applications.Fil: Solsona, Jorge Alberto. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Gómez Jorge, Sebastián. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; ArgentinaFil: Busada, Claudio. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages". Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras. Instituto de Investigaciones en Ingeniería Eléctrica "Alfredo Desages"; Argentin

Optimized active disturbance rejection control for DC-DC buck converters with uncertainties using a reduced-order GPI observer

The output voltage regulation problem of a PWM- based DC-DC buck converter under various sources of uncertainties and disturbances is investigated in this paper via an optimized active disturbance rejection control (ADRC) approach. Aiming to practical implementation, a new reduced-order generalized proportional integral (GPI) observer is first designed to estimate the lumped (possibly time-varying) disturbances within the DC- DC circuit. By integrating the disturbance estimation information raised by the reduced-order GPI observer (GPIO) into the output prediction, an optimized ADRC method is developed to achieve optimized tracking performance even in the presence of distur- bances and uncertainties. It is shown that the proposed controller will guarantee the rigorous stability of closed-loop system, for any bounded uncertainties of the circuit, by appropriately choosing the observer gains and the bandwidthfactor. Experimental results illustrate that the proposed control solution is characterised by improved robustness performance against various disturbances and uncertainties compared to traditional ADRC and integral MPC approaches