Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs

Intrinsic parameter fluctuations introduced by discreteness of charge and matter will play an increasingly important role when semiconductor devices are scaled to decananometer and nanometer dimensions in next-generation integrated circuits and systems. In this paper, we review the analytical and the numerical simulation techniques used to study and predict such intrinsic parameters fluctuations. We consider random discrete dopants, trapped charges, atomic-scale interface roughness, and line edge roughness as sources of intrinsic parameter fluctuations. The presented theoretical approach based on Green's functions is restricted to the case of random discrete charges. The numerical simulation approaches based on the drift diffusion approximation with density gradient quantum corrections covers all of the listed sources of fluctuations. The results show that the intrinsic fluctuations in conventional MOSFETs, and later in double gate architectures, will reach levels that will affect the yield and the functionality of the next generation analog and digital circuits unless appropriate changes to the design are made. The future challenges that have to be addressed in order to improve the accuracy and the predictive power of the intrinsic fluctuation simulations are also discussed

Quantized conductance doubling and hard gap in a two-dimensional semiconductor-superconductor heterostructure

The prospect of coupling a two-dimensional (2D) semiconductor heterostructure to a superconductor opens new research and technology opportunities, including fundamental problems in mesoscopic superconductivity, scalable superconducting electronics, and new topological states of matter. For instance, one route toward realizing topological matter is by coupling a 2D electron gas (2DEG) with strong spin-orbit interaction to an s-wave superconductor. Previous efforts along these lines have been hindered by interface disorder and unstable gating. Here, we report measurements on a gateable InGaAs/InAs 2DEG with patterned epitaxial Al, yielding multilayer devices with atomically pristine interfaces between semiconductor and superconductor. Using surface gates to form a quantum point contact (QPC), we find a hard superconducting gap in the tunneling regime, overcoming the soft-gap problem in 2D superconductor-semiconductor hybrid systems. With the QPC in the open regime, we observe a first conductance plateau at 4e^2/h, as expected theoretically for a normal-QPC-superconductor structure. The realization of a hard-gap semiconductor-superconductor system that is amenable to top-down processing provides a means of fabricating scalable multicomponent hybrid systems for applications in low-dissipation electronics and topological quantum information.Comment: includes main text, supplementary information and code for simulations. Published versio

When self-consistency makes a difference

Compound semiconductor power RF and microwave device modeling requires, in many cases, the use of selfconsistent electrothermal equivalent circuits. The slow thermal dynamics and the thermal nonlinearity should be accurately included in the model; otherwise, some response features subtly related to the detailed frequency behavior of the slow thermal dynamics would be inaccurately reproduced or completely distorted. In this contribution we show two examples, concerning current collapse in HBTs and modeling of IMPs in GaN HEMTs. Accurate thermal modeling is proved to be be made compatible with circuit-oriented CAD tools through a proper choice of system-level approximations; in the discussion we exploit a Wiener approach, but of course the strategy should be tailored to the specific problem under consideratio

An efficient approach to noise analysis through multidimensional physics-based models

IEEE TRANS. EL. DEV