50,992 research outputs found
Communication Subsystems for Emerging Wireless Technologies
The paper describes a multi-disciplinary design of modern communication systems. The design starts with the analysis of a system in order to define requirements on its individual components. The design exploits proper models of communication channels to adapt the systems to expected transmission conditions. Input filtering of signals both in the frequency domain and in the spatial domain is ensured by a properly designed antenna. Further signal processing (amplification and further filtering) is done by electronics circuits. Finally, signal processing techniques are applied to yield information about current properties of frequency spectrum and to distribute the transmission over free subcarrier channels
Neuro-memristive Circuits for Edge Computing: A review
The volume, veracity, variability, and velocity of data produced from the
ever-increasing network of sensors connected to Internet pose challenges for
power management, scalability, and sustainability of cloud computing
infrastructure. Increasing the data processing capability of edge computing
devices at lower power requirements can reduce several overheads for cloud
computing solutions. This paper provides the review of neuromorphic
CMOS-memristive architectures that can be integrated into edge computing
devices. We discuss why the neuromorphic architectures are useful for edge
devices and show the advantages, drawbacks and open problems in the field of
neuro-memristive circuits for edge computing
A Sub-ÎŒVRms Chopper Front-End for ECoG Recording
This paper presents a low-noise, low-power fully differential chopper-modulated front-end circuit intended for ECoG signal recording. Among other features, it uses a subthreshold source-follower biquad in the forward path to reduce noise and avoid the implementation of a ripple rejection loop. The prototype was designed in 0.18ÎŒm CMOS technology with a 1V supply. Post-layout simulations were carried out showing a power consumption below 2ÎŒW and an integrated input-referred noise of 0.75ÎŒV rms , with a noise floor below 50 nVâHz, over a bandwidth from 1 to 200Hz, for a noise efficiency factor of 2.7.Ministerio de EconomĂa y Empresa TEC2016-80923-
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