6,106 research outputs found

    Octopus - an energy-efficient architecture for wireless multimedia systems

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    Multimedia computing and mobile computing are two trends that will lead to a new application domain in the near future. However, the technological challenges to establishing this paradigm of computing are non-trivial. Personal mobile computing offers a vision of the future with a much richer and more exciting set of architecture research challenges than extrapolations of the current desktop architectures. In particular, these devices will have limited battery resources, will handle diverse data types, and will operate in environments that are insecure, dynamic and which vary significantly in time and location. The approach we made to achieve such a system is to use autonomous, adaptable modules, interconnected by a switch rather than by a bus, and to offload as much as work as possible from the CPU to programmable modules that is placed in the data streams. A reconfigurable internal communication network switch called Octopus exploits locality of reference and eliminates wasteful data copies

    A methodological approach to BISDN signalling performance

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    Sophisticated signalling protocols are required to properly handle the complex multimedia, multiparty services supported by the forthcoming BISDN. The implementation feasibility of these protocols should be evaluated during their design phase, so that possible performance bottlenecks are identified and removed. In this paper we present a methodology for evaluating the performance of BISDN signalling systems under design. New performance parameters are introduced and their network-dependent values are extracted through a message flow model which has the capability to describe the impact of call and bearer control separation on the signalling performance. Signalling protocols are modelled through a modular decomposition of the seven OSI layers including the service user to three submodels. The workload model is user descriptive in the sense that it does not approximate the direct input traffic required for evaluating the performance of a layer protocol; instead, through a multi-level approach, it describes the actual implications of user signalling activity for the general signalling traffic. The signalling protocol model is derived from the global functional model of the signalling protocols and information flows using a network of queues incorporating synchronization and dependency functions. The same queueing approach is followed for the signalling transfer network which is used to define processing speed and signalling bandwidth requirements and to identify possible performance bottlenecks stemming from the realization of the related protocols

    The Octopus switch

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    This chapter1 discusses the interconnection architecture of the Mobile Digital Companion. The approach to build a low-power handheld multimedia computer presented here is to have autonomous, reconfigurable modules such as network, video and audio devices, interconnected by a switch rather than by a bus, and to offload as much as work as possible from the CPU to programmable modules placed in the data streams. Thus, communication between components is not broadcast over a bus but delivered exactly where it is needed, work is carried out where the data passes through, bypassing the memory. The amount of buffering is minimised, and if it is required at all, it is placed right on the data path, where it is needed. A reconfigurable internal communication network switch called Octopus exploits locality of reference and eliminates wasteful data copies. The switch is implemented as a simplified ATM switch and provides Quality of Service guarantees and enough bandwidth for multimedia applications. We have built a testbed of the architecture, of which we will present performance and energy consumption characteristics

    Selection of systems to perform extravehicular activities, man and manipulator. Volume 2 - Final report

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    Technologies for EVA and remote manipulation systems - handbook for systems designer

    TURTLE-P: a UML profile for the formal validation of critical and distributed systems

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    The timed UML and RT-LOTOS environment, or TURTLE for short, extends UML class and activity diagrams with composition and temporal operators. TURTLE is a real-time UML profile with a formal semantics expressed in RT-LOTOS. Further, it is supported by a formal validation toolkit. This paper introduces TURTLE-P, an extended profile no longer restricted to the abstract modeling of distributed systems. Indeed, TURTLE-P addresses the concrete descriptions of communication architectures, including quality of service parameters (delay, jitter, etc.). This new profile enables co-design of hardware and software components with extended UML component and deployment diagrams. Properties of these diagrams can be evaluated and/or validated thanks to the formal semantics given in RT-LOTOS. The application of TURTLE-P is illustrated with a telecommunication satellite system

    Telecommunications Network Planning and Maintenance

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    Telecommunications network operators are on a constant challenge to provide new services which require ubiquitous broadband access. In an attempt to do so, they are faced with many problems such as the network coverage or providing the guaranteed Quality of Service (QoS). Network planning is a multi-objective optimization problem which involves clustering the area of interest by minimizing a cost function which includes relevant parameters, such as installation cost, distance between user and base station, supported traffic, quality of received signal, etc. On the other hand, service assurance deals with the disorders that occur in hardware or software of the managed network. This paper presents a large number of multicriteria techniques that have been developed to deal with different kinds of problems regarding network planning and service assurance. The state of the art presented will help the reader to develop a broader understanding of the problems in the domain

    Study of tooling concepts for manufacturing operations in space Final report

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    Mechanical linkage device for manufacturing operations with orbital workshop

    Design, implementation, and performance analysis of the WorldFIP/ATM local bridge

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    World factory instrumentation protocol (WorldFIP) is a fieldbus network protocol that provides a link between level zero (sensors/actuators) and level one (field controllers such as programmable logic controllers, etc.) in industrial automation systems. Accessing and connecting the WorldFIP remotely is important for monitoring, maintaining, and controlling devices in a factory in which asynchronous transfer mode (ATM) is used as a backbone network. In this study, a transparent WorldPIP/ATM bridge was designed and implemented in order to access devices on WorldFIP via an ATM network. This designed bridge may also provide control of the devices over wide area networks. The bridge's performance was investigated using network simulation software under various message traffic conditions. The results obtained from the simulations showed that the bridge provides real-time communications between WorldFIP and ATM

    Performance of a ATM Lan switching fabric

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    This thesis provides a focus on the architecture of a high-speed packet switching fabric and its performance. The switching fabric is suited for existing transparent protocols, based on Asynchronous Transfer Mode (ATM) technology and standards in an environment of Local Area Network (LAN). A high-speed switching fabric architecture which adopts Time Division mode and bases on a shared medium approach is proposed. This is an architecture for nonblocking performance, no congestion and high reliability. Its principle for performance is a method of sequentially scheduling the inputs and the transferring of bits in parallel. To study the performance of the switching fabric architecture one uses OPNET communication simulation software. Some parameters including the throughputs, the transfer (the switching fabric) delay, the switching overflow and the packet size in the buffer (the input buffer and the output buffer) are implemented through the simulation. And finally, an analysis for the results of the simulation for local ATM IDS fabric architecture is discussed. The results display an architecture that provides a rational design with some expected characteristics
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