Delay Extraction based Macromodeling with Parallel Processing for Efficient Simulation of High Speed Distributed Networks

This thesis attempts to address the computational demands of accurate modeling of high speed distributed networks such as interconnect networks and power distribution networks. In order to do so, two different approaches towards modeling of high speed distributed networks are considered. One approach deals with cases where the physical characteristics of the network are not known and the network is characterized by its frequency domain tabulated data. Such examples include long interconnect networks described by their Y parameter data. For this class of problems, a novel delay extraction based IFFT algorithm has been developed for accurate transient response simulation. The other modeling approach is based on a detailed knowledge of the physical and electrical characteristics of the network and assuming a quasi transverse mode of propagation of the electromagnetic wave through the network. Such problems may include two dimensional (2D) and three dimensional (3D) power distribution networks with known geometry and materials. For this class of problem, a delay extraction based macromodeling approaches is proposed which has been found to be able to capture the distributed effects of the network resulting in more compact and accurate simulation compared to the state-of-the-art quasi-static lumped models. Furthermore, waveform relaxation based algorithms for parallel simulations of large interconnect networks and 2D power distribution networks is also presented. A key contribution of this body of work is the identification of naturally parallelizable and convergent iterative techniques that can divide the computational costs of solving such large macromodels over a multi-core hardware

Efficient Macromodeling Techniques of Distributed Networks Using Tabulated Data

Efficient macromodeling techniques used to model multi-port distributed systems using tabulated data are presented. First a method to macromodel large multiport systems characterized by noisy frequency domain data is shown. The proposed method is based on the vector fitting algorithm and uses an instrumental variable approach and QR decomposition to formulate the least squares equations. The instrumental variable method minimizes the biasing effect of the least squares solution caused by the noise of the data samples while QR decomposition decouples the least squares equations of multiport systems described by common set of poles. It is illustrated, that the proposed approach can increase the accuracy of the pole-residue estimates with less iteration when compared to the traditional QR decomposition vector fitting method. Second, a method to obtain delay rational macromodels of electrically long interconnects from tabulated frequency data, is presented. The proposed algorithm first extracts multiple propagation delays and splits the data into single delay regions using a time-frequency decomposition transform. Then, the attenuation losses of each region is approximated using the Loewner Matrix approach. The resulting macromodel is a combination of delay rational approximations. Numerical examples are presented to illustrate efficiency of the proposed method compared to traditional Loewner where the delays are not extracted beforehand

Longitudinal Partitioning Waveform Relaxation Methods For The Analysis of Transmission Line Circuits

Three research projects are presented in this manuscript. Projects one and two describe two waveform relaxation algorithms (WR) with longitudinal partitioning for the time-domain analysis of transmission line circuits. Project three presents theoretical results about the convergence of WR for chains of general circuits. The first WR algorithm uses a assignment-partition procedure that relies on inserting external series combinations of positive and negative resistances into the circuit to control the speed of convergence of the algorithm. The convergence of the subsequent WR method is examined, and fast convergence is cast as a generic optimization problem in the frequency-domain. An automatic suboptimal numerical solution of the min-max problem is presented and a procedure to construct its objective function is suggested. Numerical examples illustrate the parallelizability and good scaling of the WR algorithm and point out to the limitation of resistive coupling. In the second WR algorithm, resistances from the previous insertion are replaced with dissipative impedances to address the slow convergence of standard resistive coupling of the first algorithm for low-loss highly reactive circuits. The pertinence and feasibility of impedance coupling are demonstrated and the properties of the subsequent WR method are studied. A new coupling strategy proposes judicious approximations of the optimal convergence conditions for faster speed of convergence. The proposed strategy avoids the difficult problem of optimisation and uses coarse macromodeling of the transmission line to construct approximations with delay under circuit form. Numerical examples confirm a superior speed of convergence which leads to further runtime saving. Finally, new results concerning the nilpotent WR algorithm are presented for chains of circuits when dissipative coupling is used. It is shown that optimal local convergence is necessary to achieve the optimal WR algorithm. However, the converse is not correct: the WR algorithm with optimal local convergences factors can be nilpotent yet not optimal or even be non-nilpotent at all. The second analysis concerns resistive coupling. It is demonstrated that WR always converges for chains circuits. More precisely, it is shown that WR will converge independently of the length of the chain when this late is made of identical symmetric circuits

Modeling for the Computer-Aided Design of Long Interconnects

L'abstract è presente nell'allegato / the abstract is in the attachmen

Analysis and design of power delivery networks exploiting simulation tools and numerical optimization techniques

A higher performance of computing systems is being demanded year after year, driving the digital industry to fiercely compete for offering the fastest computer system at the lowest cost. In addition, as computing system performance is growing, power delivery networks (PDN) and power integrity (PI) designs are getting increasingly more relevance due to the faster speeds and more parallelism required to obtain the required performance growth. The largest data throughput at the lowest power consumption is a common goal for most of the commercial computing systems. As a consequence of this performance growth and power delivery tradeoffs, the complexity involved in analyzing and designing PDN in digital systems is being increased. This complexity drives longer design cycle times when using traditional design tools. For this reason, the need of using more efficient design methods is getting more relevance in order to keep designing and launching products in a faster manner to the market. This trend pushes PDN designers to look for methodologies to simplify analysis and reduce design cycle times. The main objective for this Master’s thesis is to propose alternative methods by exploiting reliable simulation approaches and efficient numerical optimization techniques to analyze and design PDN to ensure power integrity. This thesis explores the use of circuital models and electromagnetic (EM) field solvers in combination with numerical optimization methods, including parameter extraction (PE) formulations. It also establishes a sound basis for using space mapping (SM) methodologies in future developments, in a way that we exploit the advantages of the most accurate and powerful models, such as 3D full-wave EM simulators, but conserving the simplicity and low computational resourcing of the analytical, circuital, and empirical models

Application of wavelet theory for transient simulation of distributed network.

by Wai-Hung Leung.Thesis (M.Phil.)--Chinese University of Hong Kong, 1995.Includes bibliographical references (leaves 73-75).Chapter 1 --- Introduction --- p.1Chapter 2 --- Wavelet Theory --- p.5Chapter 2-1 --- Basic Wavelet Theories --- p.5Chapter 2-2 --- Example of Haar Wavelet Base --- p.6Chapter 2-3 --- Wavelet Decomposition and Reconstruction with Multiresolution Analysis --- p.12Chapter 2-4 --- Conditions for the Effective Filter Bank and the Constructions of the Filter Coefficients --- p.17Chapter 2-5 --- Comparison between Wavelet Analysis and Fourier Analysis --- p.20Chapter 3 --- Waveform Relaxation Analysis of Distributed Network --- p.25Chapter 3-1 --- Introduction --- p.25Chapter 3-2 --- Method of Characteristics for the Simulation of Transmission Lines --- p.27Chapter 3-3 --- Waveform Relaxation Algorithm --- p.30Chapter 3-4 --- Pade Synthesis of Lossy Characteristic Impedance --- p.33Chapter 4 --- Application of FFT on the Transient Simulation of Distributed Network --- p.39Chapter 4-1 --- Simulation of Wave Propagation in Lossy Transmission Line with FFT --- p.39Chapter 4-2 --- Some Special Properties of the Wave Propagation Function of Lossy Transmission Lines --- p.44Chapter 5 --- Wavelet-based Convolution --- p.49Chapter 5-1 --- Introduction --- p.49Chapter 5-2 --- Application of Wavelet-based Convolution on the Simulation of Wave Propagation Function and Waveform Transformation --- p.58Chapter 6 --- Experimental Results of using Wavelet- based Convolution on the Transient Simulation of Lossy Transmission Lines --- p.64Chapter 7 --- Conclusions and Prospective Studies --- p.71Chapter 8 --- References --- p.73Appendix Program Lists --- p.7

High-order, Dispersionless "Fast-Hybrid" Wave Equation Solver. Part I: O(1)\mathcal{O}(1) Sampling Cost via Incident-Field Windowing and Recentering

This paper proposes a frequency/time hybrid integral-equation method for the time dependent wave equation in two and three-dimensional spatial domains. Relying on Fourier Transformation in time, the method utilizes a fixed (time-independent) number of frequency-domain integral-equation solutions to evaluate, with superalgebraically-small errors, time domain solutions for arbitrarily long times. The approach relies on two main elements, namely, 1) A smooth time-windowing methodology that enables accurate band-limited representations for arbitrarily-long time signals, and 2) A novel Fourier transform approach which, in a time-parallel manner and without causing spurious periodicity effects, delivers numerically dispersionless spectrally-accurate solutions. A similar hybrid technique can be obtained on the basis of Laplace transforms instead of Fourier transforms, but we do not consider the Laplace-based method in the present contribution. The algorithm can handle dispersive media, it can tackle complex physical structures, it enables parallelization in time in a straightforward manner, and it allows for time leaping---that is, solution sampling at any given time $T$ at $\mathcal{O}(1)$-bounded sampling cost, for arbitrarily large values of $T$, and without requirement of evaluation of the solution at intermediate times. The proposed frequency-time hybridization strategy, which generalizes to any linear partial differential equation in the time domain for which frequency-domain solutions can be obtained (including e.g. the time-domain Maxwell equations), and which is applicable in a wide range of scientific and engineering contexts, provides significant advantages over other available alternatives such as volumetric discretization, time-domain integral equations, and convolution-quadrature approaches.Comment: 33 pages, 8 figures, revised and extended manuscript (and now including direct comparisons to existing CQ and TDIE solver implementations) (Part I of II

Automated Debugging Methodology for FPGA-based Systems

Electronic devices make up a vital part of our lives. These are seen from mobiles, laptops, computers, home automation, etc. to name a few. The modern designs constitute billions of transistors. However, with this evolution, ensuring that the devices fulfill the designer’s expectation under variable conditions has also become a great challenge. This requires a lot of design time and effort. Whenever an error is encountered, the process is re-started. Hence, it is desired to minimize the number of spins required to achieve an error-free product, as each spin results in loss of time and effort. Software-based simulation systems present the main technique to ensure the verification of the design before fabrication. However, few design errors (bugs) are likely to escape the simulation process. Such bugs subsequently appear during the post-silicon phase. Finding such bugs is time-consuming due to inherent invisibility of the hardware. Instead of software simulation of the design in the pre-silicon phase, post-silicon techniques permit the designers to verify the functionality through the physical implementations of the design. The main benefit of the methodology is that the implemented design in the post-silicon phase runs many order-of-magnitude faster than its counterpart in pre-silicon. This allows the designers to validate their design more exhaustively. This thesis presents five main contributions to enable a fast and automated debugging solution for reconfigurable hardware. During the research work, we used an obstacle avoidance system for robotic vehicles as a use case to illustrate how to apply the proposed debugging solution in practical environments. The first contribution presents a debugging system capable of providing a lossless trace of debugging data which permits a cycle-accurate replay. This methodology ensures capturing permanent as well as intermittent errors in the implemented design. The contribution also describes a solution to enhance hardware observability. It is proposed to utilize processor-configurable concentration networks, employ debug data compression to transmit the data more efficiently, and partially reconfiguring the debugging system at run-time to save the time required for design re-compilation as well as preserve the timing closure. The second contribution presents a solution for communication-centric designs. Furthermore, solutions for designs with multi-clock domains are also discussed. The third contribution presents a priority-based signal selection methodology to identify the signals which can be more helpful during the debugging process. A connectivity generation tool is also presented which can map the identified signals to the debugging system. The fourth contribution presents an automated error detection solution which can help in capturing the permanent as well as intermittent errors without continuous monitoring of debugging data. The proposed solution works for designs even in the absence of golden reference. The fifth contribution proposes to use artificial intelligence for post-silicon debugging. We presented a novel idea of using a recurrent neural network for debugging when a golden reference is present for training the network. Furthermore, the idea was also extended to designs where golden reference is not present

Design Techniques for Energy-Quality Scalable Digital Systems

Energy efficiency is one of the key design goals in modern computing. Increasingly complex tasks are being executed in mobile devices and Internet of Things end-nodes, which are expected to operate for long time intervals, in the orders of months or years, with the limited energy budgets provided by small form-factor batteries. Fortunately, many of such tasks are error resilient, meaning that they can toler- ate some relaxation in the accuracy, precision or reliability of internal operations, without a significant impact on the overall output quality. The error resilience of an application may derive from a number of factors. The processing of analog sensor inputs measuring quantities from the physical world may not always require maximum precision, as the amount of information that can be extracted is limited by the presence of external noise. Outputs destined for human consumption may also contain small or occasional errors, thanks to the limited capabilities of our vision and hearing systems. Finally, some computational patterns commonly found in domains such as statistics, machine learning and operational research, naturally tend to reduce or eliminate errors. Energy-Quality (EQ) scalable digital systems systematically trade off the quality of computations with energy efficiency, by relaxing the precision, the accuracy, or the reliability of internal software and hardware components in exchange for energy reductions. This design paradigm is believed to offer one of the most promising solutions to the impelling need for low-energy computing. Despite these high expectations, the current state-of-the-art in EQ scalable design suffers from important shortcomings. First, the great majority of techniques proposed in literature focus only on processing hardware and software components. Nonetheless, for many real devices, processing contributes only to a small portion of the total energy consumption, which is dominated by other components (e.g. I/O, memory or data transfers). Second, in order to fulfill its promises and become diffused in commercial devices, EQ scalable design needs to achieve industrial level maturity. This involves moving from purely academic research based on high-level models and theoretical assumptions to engineered flows compatible with existing industry standards. Third, the time-varying nature of error tolerance, both among different applications and within a single task, should become more central in the proposed design methods. This involves designing “dynamic” systems in which the precision or reliability of operations (and consequently their energy consumption) can be dynamically tuned at runtime, rather than “static” solutions, in which the output quality is fixed at design-time. This thesis introduces several new EQ scalable design techniques for digital systems that take the previous observations into account. Besides processing, the proposed methods apply the principles of EQ scalable design also to interconnects and peripherals, which are often relevant contributors to the total energy in sensor nodes and mobile systems respectively. Regardless of the target component, the presented techniques pay special attention to the accurate evaluation of benefits and overheads deriving from EQ scalability, using industrial-level models, and on the integration with existing standard tools and protocols. Moreover, all the works presented in this thesis allow the dynamic reconfiguration of output quality and energy consumption. More specifically, the contribution of this thesis is divided in three parts. In a first body of work, the design of EQ scalable modules for processing hardware data paths is considered. Three design flows are presented, targeting different technologies and exploiting different ways to achieve EQ scalability, i.e. timing-induced errors and precision reduction. These works are inspired by previous approaches from the literature, namely Reduced-Precision Redundancy and Dynamic Accuracy Scaling, which are re-thought to make them compatible with standard Electronic Design Automation (EDA) tools and flows, providing solutions to overcome their main limitations. The second part of the thesis investigates the application of EQ scalable design to serial interconnects, which are the de facto standard for data exchanges between processing hardware and sensors. In this context, two novel bus encodings are proposed, called Approximate Differential Encoding and Serial-T0, that exploit the statistical characteristics of data produced by sensors to reduce the energy consumption on the bus at the cost of controlled data approximations. The two techniques achieve different results for data of different origins, but share the common features of allowing runtime reconfiguration of the allowed error and being compatible with standard serial bus protocols. Finally, the last part of the manuscript is devoted to the application of EQ scalable design principles to displays, which are often among the most energy- hungry components in mobile systems. The two proposals in this context leverage the emissive nature of Organic Light-Emitting Diode (OLED) displays to save energy by altering the displayed image, thus inducing an output quality reduction that depends on the amount of such alteration. The first technique implements an image-adaptive form of brightness scaling, whose outputs are optimized in terms of balance between power consumption and similarity with the input. The second approach achieves concurrent power reduction and image enhancement, by means of an adaptive polynomial transformation. Both solutions focus on minimizing the overheads associated with a real-time implementation of the transformations in software or hardware, so that these do not offset the savings in the display. For each of these three topics, results show that the aforementioned goal of building EQ scalable systems compatible with existing best practices and mature for being integrated in commercial devices can be effectively achieved. Moreover, they also show that very simple and similar principles can be applied to design EQ scalable versions of different system components (processing, peripherals and I/O), and to equip these components with knobs for the runtime reconfiguration of the energy versus quality tradeoff

Krylov's methods in function space for waveform relaxation.

by Wai-Shing Luk.Thesis (Ph.D.)--Chinese University of Hong Kong, 1996.Includes bibliographical references (leaves 104-113).Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Functional Extension of Iterative Methods --- p.2Chapter 1.2 --- Applications in Circuit Simulation --- p.2Chapter 1.3 --- Multigrid Acceleration --- p.3Chapter 1.4 --- Why Hilbert Space? --- p.4Chapter 1.5 --- Parallel Implementation --- p.5Chapter 1.6 --- Domain Decomposition --- p.5Chapter 1.7 --- Contributions of This Thesis --- p.6Chapter 1.8 --- Outlines of the Thesis --- p.7Chapter 2 --- Waveform Relaxation Methods --- p.9Chapter 2.1 --- Basic Idea --- p.10Chapter 2.2 --- Linear Operators between Banach Spaces --- p.14Chapter 2.3 --- Waveform Relaxation Operators for ODE's --- p.16Chapter 2.4 --- Convergence Analysis --- p.19Chapter 2.4.1 --- Continuous-time Convergence Analysis --- p.20Chapter 2.4.2 --- Discrete-time Convergence Analysis --- p.21Chapter 2.5 --- Further references --- p.24Chapter 3 --- Waveform Krylov Subspace Methods --- p.25Chapter 3.1 --- Overview of Krylov Subspace Methods --- p.26Chapter 3.2 --- Krylov Subspace methods in Hilbert Space --- p.30Chapter 3.3 --- Waveform Krylov Subspace Methods --- p.31Chapter 3.4 --- Adjoint Operator for WBiCG and WQMR --- p.33Chapter 3.5 --- Numerical Experiments --- p.35Chapter 3.5.1 --- Test Circuits --- p.36Chapter 3.5.2 --- Unstructured Grid Problem --- p.39Chapter 4 --- Parallel Implementation Issues --- p.50Chapter 4.1 --- DECmpp 12000/Sx Computer and HPF --- p.50Chapter 4.2 --- Data Mapping Strategy --- p.55Chapter 4.3 --- Sparse Matrix Format --- p.55Chapter 4.4 --- Graph Coloring for Unstructured Grid Problems --- p.57Chapter 5 --- The Use of Inexact ODE Solver in Waveform Methods --- p.61Chapter 5.1 --- Inexact ODE Solver for Waveform Relaxation --- p.62Chapter 5.1.1 --- Convergence Analysis --- p.63Chapter 5.2 --- Inexact ODE Solver for Waveform Krylov Subspace Methods --- p.65Chapter 5.3 --- Experimental Results --- p.68Chapter 5.4 --- Concluding Remarks --- p.72Chapter 6 --- Domain Decomposition Technique --- p.80Chapter 6.1 --- Introduction --- p.80Chapter 6.2 --- Overlapped Schwarz Methods --- p.81Chapter 6.3 --- Numerical Experiments --- p.83Chapter 6.3.1 --- Delay Circuit --- p.83Chapter 6.3.2 --- Unstructured Grid Problem --- p.86Chapter 7 --- Conclusions --- p.90Chapter 7.1 --- Summary --- p.90Chapter 7.2 --- Future Works --- p.92Chapter A --- Pseudo Codes for Waveform Krylov Subspace Methods --- p.94Chapter B --- Overview of Recursive Spectral Bisection Method --- p.101Bibliography --- p.10