106 research outputs found
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ANALOG SIGNAL PROCESSING SOLUTIONS AND DESIGN OF MEMRISTOR-CMOS ANALOG CO-PROCESSOR FOR ACCELERATION OF HIGH-PERFORMANCE COMPUTING APPLICATIONS
Emerging applications in the field of machine vision, deep learning and scientific simulation require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet these ever-increasing demands. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. The major contribution of this work is to show that analog processing can be a viable solution to this problem. This is demonstrated in the three parts of the dissertation.
In the first part of the dissertation, we demonstrate that analog processing can be used to solve the problem of stereo correspondence. Novel modifications to the algorithms are proposed which improves the computational speed and makes them efficiently implementable in analog hardware. The analog domain implementation provides further speedup in computation and has lower power consumption than a digital implementation.
In the second part of the dissertation, a prototype of an analog processor was developed using commercially available off-the-shelf components. The focus was on providing experimental results that demonstrate functionality and to show that the performance of the prototype for low-level and mid-level image processing tasks is equivalent to a digital implementation. To demonstrate improvement in speed and power consumption, an integrated circuit design of the analog processor was proposed, and it was shown that such an analog processor would be faster than state-of-the-art digital and other analog processors.
In the third part of the dissertation, a memristor-CMOS analog co-processor that can perform floating point vector matrix multiplication (VMM) is proposed. VMM computation underlies some of the major applications. To demonstrate the working of the analog co-processor at a system level, a new tool called PSpice Systems Option is used. It is shown that the analog co-processor has a superior performance when compared to the projected performances of digital and analog processors. Using the new tool, various application simulations for image processing and solution to partial differential equations are performed on the co-processor model
Analog Spiking Neuromorphic Circuits and Systems for Brain- and Nanotechnology-Inspired Cognitive Computing
Human society is now facing grand challenges to satisfy the growing demand for computing power, at the same time, sustain energy consumption. By the end of CMOS technology scaling, innovations are required to tackle the challenges in a radically different way. Inspired by the emerging understanding of the computing occurring in a brain and nanotechnology-enabled biological plausible synaptic plasticity, neuromorphic computing architectures are being investigated. Such a neuromorphic chip that combines CMOS analog spiking neurons and nanoscale resistive random-access memory (RRAM) using as electronics synapses can provide massive neural network parallelism, high density and online learning capability, and hence, paves the path towards a promising solution to future energy-efficient real-time computing systems. However, existing silicon neuron approaches are designed to faithfully reproduce biological neuron dynamics, and hence they are incompatible with the RRAM synapses, or require extensive peripheral circuitry to modulate a synapse, and are thus deficient in learning capability. As a result, they eliminate most of the density advantages gained by the adoption of nanoscale devices, and fail to realize a functional computing system.
This dissertation describes novel hardware architectures and neuron circuit designs that synergistically assemble the fundamental and significant elements for brain-inspired computing. Versatile CMOS spiking neurons that combine integrate-and-fire, passive dense RRAM synapses drive capability, dynamic biasing for adaptive power consumption, in situ spike-timing dependent plasticity (STDP) and competitive learning in compact integrated circuit modules are presented. Real-world pattern learning and recognition tasks using the proposed architecture were demonstrated with circuit-level simulations. A test chip was implemented and fabricated to verify the proposed CMOS neuron and hardware architecture, and the subsequent chip measurement results successfully proved the idea.
The work described in this dissertation realizes a key building block for large-scale integration of spiking neural network hardware, and then, serves as a step-stone for the building of next-generation energy-efficient brain-inspired cognitive computing systems
Neuromorphic systems based on memristive devices - From the material science perspective to bio-inspired learning hardware
Hardware computation is facing in the present age a deep transformation of its own paradigms. Silicon based computation is reaching its limit due to the physical constraints of transistor technology. As predicted by the Moore’s law, downscaling
of transistor dimensions doubled each year since the 60s, leading nowadays to the extreme of 16-nm channel width of the present state-of-the-art technology. No further improvement is possible, since laws of physics impose a different electrical
behavior when lower dimensions are attempted. Multiple solutions are then envisaged, spanning the range from quantum computing to neuromorphic computing.
The present dissertation wants to be a preliminary study for understanding the opportunities enabled by neuromorphic computing based on resistive switching memories. In particular, brain inspires technology and architecture of new generation processors because of its unique properties: parallel and distributed computation, superposition of processing and memory unit, low power consumption, to cite only some of them. Such features make brain particularly efficient and robust against degraded data, further than particularly suitable to process and store in memory new nformation. Despite many research projects and some commercial products are already proposing brain-like computing processors, like spiNNaker or IBM’s Bluenorth, they only mimic the brain functioning with standard Silicon technology, that is inherently serial
and distinguish between processing and memory unit. Resistive switching technology on the other hand, would allow to overcome many of these issues, enabling a far better match between biological and artificial neuromorphic computation.
Resistive switching are, generally speaking, Metal-Insulator-Metal structures able to change their electrical conductance as a consequence of the history of applied electric signal. In such sense, they behave exactly as synapses do in a biological
neural networks. For this reason, resistive switching when modeled as memristor, i.e. memory-resistor, can act as artificial synapses and, moreover, are particularly suitable to be interfaced with artificial Silicon neurons that are designed to replicate the biological behavior when excited with electric pulses. Anyhow, from the technological standpoint, there is still no standard on the design and fabrication of resistive switching, so that multiple structure and materials are investigated.
In this dissertation, it is reported an analysis of multiple resistive switching devices, based on various materials, i.e. TiO2, ZnO and HfO, and device architectures, i.e. thin film and nanostructured devices, with the scope of both characterizing and
comprehending the physics behind resistive switching phenomena. Furthermore, numerical simulations of artificial spiking neural networks, embedding Silicon neurons and HfO-based resistive switching are designed and performed, in order to give a systematic analysis of the performances reached by this new kind of computing paradigm
SPICE Simulation of RRAM-Based Cross-Point Arrays Using the Dynamic Memdiode Model
We thoroughly investigate the performance of the Dynamic Memdiode Model (DMM) when used for simulating the synaptic weights in large RRAM-based cross-point arrays (CPA) intended for neuromorphic computing. The DMM is in line with Prof. Chua’s memristive devices theory, in which the hysteresis phenomenon in electroformed metal-insulator-metal structures is represented by means of two coupled equations: one equation for the current-voltage characteristic of the device based on an extension of the quantum point-contact (QPC) model for dielectric breakdown and a second equation for the memory state, responsible for keeping track of the previous history of the device. By considering ex-situ training of the CPA aimed at classifying the handwritten characters of the MNIST database, we evaluate the performance of a Write-Verify iterative scheme for setting the crosspoint conductances to their target values. The total programming time, the programming error, and the inference accuracy obtained with such writing scheme are investigated in depth. The role played by parasitic components such as the line resistance as well as some CPA’s particular features like the dynamical range of the memdiodes are discussed. The interrelationship between the frequency and amplitude values of the write pulses is explored in detail. In addition, the effect of the resistance shift for the case of a CPA programmed with no errors is studied for a variety of input signals, providing a design guideline for selecting the appropriate pulse’s amplitude and frequency.Fil: Aguirre, Fernando Leonel. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las IngenierÃas; Argentina. Consejo Nacional de Investigaciones CientÃficas y Técnicas; ArgentinaFil: Pazos, Sebastián MatÃas. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las IngenierÃas; Argentina. Consejo Nacional de Investigaciones CientÃficas y Técnicas; ArgentinaFil: Palumbo, Félix Roberto Mario. Consejo Nacional de Investigaciones CientÃficas y Técnicas; Argentina. Universidad Tecnológica Nacional. Facultad Regional Buenos Aires. Unidad de Investigación y Desarrollo de las IngenierÃas; ArgentinaFil: Suñé, Jordi. Universitat Autònoma de Barcelona; EspañaFil: Miranda, Enrique. Universitat Autònoma de Barcelona; Españ
Chalcogenide and metal-oxide memristive devices for advanced neuromorphic computing
Energy-intensive artificial intelligence (AI) is prevailing and changing the world, which requires energy-efficient computing technology. However, traditional AI driven by von Neumann computing systems suffers from the penalties of high-energy consumption and time delay due to frequent data shuttling. To tackle the issue, brain-inspired neuromorphic computing that performs data processing in memory is developed, reducing energy consumption and processing time. Particularly, some advanced neuromorphic systems perceive environmental variations and internalize sensory signals for localized in-senor computing. This methodology can further improve data processing efficiency and develop multifunctional AI products. Memristive devices are one of the promising candidates for neuromorphic systems due to their non-volatility, small size, fast speed, low-energy consumption, etc.
In this thesis, memristive devices based on chalcogenide and metal-oxide materials are fabricated for neuromorphic computing systems. Firstly, a versatile memristive device (Ag/CuInSe2/Mo) is demonstrated based on filamentary switching. Non-volatile and volatile features are coexistent, which play multiple roles of non-volatile memory, selectors, artificial neurons, and artificial synapses. The conductive filaments’ lifetime was controlled to present both volatile and non-volatile behaviours. Secondly, the sensing functions (temperature and humidity) are explored based on Ag conductive filaments. An intelligent matter (Ag/Cu(In, Ga)Se2/Mo) endowing reconfigurable temperature and humidity sensations is developed for sensory neuromorphic systems. The device reversibly switches between two states with differentiable semiconductive and metallic features, demonstrating different responses to temperature and humidity variations. Integrated devices can be employed for intelligent electronic skin and in-sensor computing. Thirdly, the memristive-based sensing function of light was investigated. An optoelectronic synapse (ITO/ZnO/MoO3/Mo) enabling multi-spectrum sensitivity for machine vision systems is developed. For the first time, this optoelectronic synapse is practical for front-end retinomorphic image sensing, convolution processing, and back-end neuromorphic computing. This thesis will benefit the development of advanced neuromorphic systems pushing forward AI technology
2D semiconductor nanomaterials and heterostructures : controlled synthesis and functional applications
Two-dimensional (2D) semiconductors beyond graphene represent the thinnest stable known nanomaterials. Rapid growth of their family and applications during the last decade of the twenty-first century have brought unprecedented opportunities to the advanced nano- and opto-electronic technologies. In this article, we review the latest progress in findings on the developed 2D nanomaterials. Advanced synthesis techniques of these 2D nanomaterials and heterostructures were summarized and their novel applications were discussed. The fabrication techniques include the state-of-the-art developments of the vapor-phase-based deposition methods and novel van der Waals (vdW) exfoliation approaches for fabrication both amorphous and crystalline 2D nanomaterials with a particular focus on the chemical vapor deposition (CVD), atomic layer deposition (ALD) of 2D semiconductors and their heterostructures as well as on vdW exfoliation of 2D surface oxide films of liquid metals
Design of Robust Memristor-Based Neuromorphic Circuits and Systems with Online Learning
Computing systems that are capable of performing human-like cognitive tasks have been an area of active research in the recent past. However, due to the bottleneck faced by the traditionally adopted von Neumann computing architecture, bio-inspired neural network style computing paradigm has seen a spike in research interest. Physical implementations of this paradigm of computing are known as neuromorphic systems. In the recent years, in the domain of neuromorphic systems, memristor based neuromorphic systems have gained increased attention from the research community due to the advantages offered by memristors such as their nanoscale size, nonvolatile nature and power efficient programming capability. However, these devices also suffer from a variety of non-ideal behaviors such as switching speed and threshold asymmetry, limited resolution and endurance that can have a detrimental impact on the operation of the systems employing these devices. This work aims to develop device-aware circuits that are robust in the face of such non-ideal properties. A bi-memristor synapse is first presented whose spike-timing-dependent plasticity (STDP) behavior can be precisely controlled on-chip and hence is shown to be robust. Later, a mixed-mode neuron is introduced that is amenable for use in conjunction with a range of memristors without needing to custom design it. These circuits are then used together to construct a memristive crossbar based system with supervised STDP learning to perform a pattern recognition application. The learning in the crossbar system is shown to be robust to the device-level issues owing to the robustness of the proposed circuits. Lastly, the proposed circuits are applied to build a liquid state machine based reservoir computing system. The reservoir used here is a spiking recurrent neural network generated using an evolutionary optimization algorithm and the readout layer is built with the crossbar system presented earlier, with STDP based online learning. A generalized framework for the hardware implementation of this system is proposed and it is shown that this liquid state machine is robust against device-level switching issues that would have otherwise impacted learning in the readout layer. Thereby, it is demonstrated that the proposed circuits along with their learning techniques can be used to build robust memristor-based neuromorphic systems with online learning
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