Intermittent Computing: Challenges and Opportunities

The maturation of energy-harvesting technology and ultra-low-power computer systems has led to the advent of intermittently-powered, batteryless devices that operate entirely using energy extracted from their environment. Intermittently operating devices present a rich vein of programming languages research challenges and the purpose of this paper is to illustrate these challenges to the PL research community. To provide depth, this paper includes a survey of the hardware and software design space of intermittent computing platforms. On the foundation of these research challenges and the state of the art in intermittent hardware and software, this paper describes several future PL research directions, emphasizing a connection between intermittence, distributed computing, energy-aware programming and compilation, and approximate computing. We illustrate these connections with a discussion of our ongoing work on programming for intermittence, and on building and simulating intermittent distributed systems

MPSoC Zoom Debugging: A Deterministic Record-Partial Replay Approach

Accepté à EUC'2014International audienceThis work presents a debugging methodology for MPSoC based on deterministic record-replay. We propose a general model of MPSoC and define a debugging cycle targeting errors by applying temporal and spatial selection criteria. The idea behind spatial and temporal selection is to consider not the entire execution of the whole application but replay a part of the application during a specific execution interval. The proposed mechanisms are connected to GDB and allow for a visual representation of the considered part of the trace. The approach is validated on two execution platforms and two multimedia applications

LO-FAT: Low-Overhead Control Flow ATtestation in Hardware

Attacks targeting software on embedded systems are becoming increasingly prevalent. Remote attestation is a mechanism that allows establishing trust in embedded devices. However, existing attestation schemes are either static and cannot detect control-flow attacks, or require instrumentation of software incurring high performance overheads. To overcome these limitations, we present LO-FAT, the first practical hardware-based approach to control-flow attestation. By leveraging existing processor hardware features and commonly-used IP blocks, our approach enables efficient control-flow attestation without requiring software instrumentation. We show that our proof-of-concept implementation based on a RISC-V SoC incurs no processor stalls and requires reasonable area overhead.Comment: Authors' pre-print version to appear in DAC 2017 proceeding

A Detailed Analogy of Network Simulators � NS1, NS2, NS3 and NS4

Networking is a field of Computer Science where the researchers are dependent on simulators and simulation as the devices used in networking are very costly and complex. It is not easily possible to establish a computer network in real world easily, also direct installation of network devices and cables is not feasible. A simulator is a low cost mechanism which can be used to deploy a network and implement protocols and test the feasibility of the network. NS aka Network Simulator is one such low cost tool, which is available as open source software to network designers. With time simulators have evolved and now Network simulators can simulate wireless networks and advanced mobile networks. The Network Simulator evolution took place with the methodologies and coding technologies. Medium level language like C++ was used in NS1 and later in NS2 we started using easy modeling language like OTCL and C++. In NS3 we can now do coding with more powerful language Python, it also has support for OTCL and C++. High level and advanced language like P4 is the recent one to be used in NS4. The network simulators are now more powerful and fast, as compared to earlier generations of simulators. This paper talks about these advancements that have taken place in the history of Network Simulators and future scopes of NS