Silicon- and Graphene-based FETs for THz technology

[EN] This Thesis focuses on the study of the response to Terahertz (THz) electromagnetic radiation of different silicon substrate-compatible FETs. Strained-Si MODFETs, state-of- the-art FinFETs and graphene-FETs were studied. The first part of this thesis is devoted to present the results of an experimental and theoretical study of strained-Si MODFETs. These transistors are built by epitaxy of relaxed-SiGe on a conventional Si wafer to permit the fabrication of a strained-Si electron channel to obtain a high-mobility electron gas. Room temperature detection under excitation of 0.15 and 0.3 THz as well as sensitivity to the polarization of incoming radiations were demonstrated. A two-dimensional hydrodynamic-model was developed to conduct TCAD simulations to understand and predict the response of the transistors. Both experimental data and TCAD results were in good agreement demonstrating both the potential of TCAD as a tool for the design of future new THz devices and the excellent performance of strained-Si MODFETs as THz detectors (75 V/W and 0.06 nW/Hz0.5). The second part of the Thesis reports on an experimental study on the THz behavior of modern silicon FinFETs at room temperature. Silicon FinFETs were characterized in the frequency range 0.14-0.44 THz. The results obtained in this study show the potential of these devices as THz detectors in terms of their excellent Responsivity and NEP figures (0.66 kV/W and 0.05 nW/Hz0.5). Finally, a large part of the Thesis is devoted to the fabrication and characterization of Graphene-based FETs. A novel transfer technique and an in-house-developed setup were implemented in the Nanotechnology Clean Room of the USAL and described in detail in this Thesis. The newly developed transfer technique enables to encapsulate a graphene layer between two flakes of h-BN. Raman measurements confirmed the quality of the fabricated graphene heterostructures and, thus, the excellent properties of encapsulated graphene. The asymmetric dual grating gate graphene FET (ADGG-GFET) concept was introduced as an efficient way to improve the graphene response to THz radiation. High quality ADGG-GFETs were fabricated and characterized under THz radiation. DC measurements confirmed the high quality of graphene heterostructures as it was shown on Raman measurements. A clear THz detection was found for both 0.15 THz and 0.3 THz at 4K when the device was voltage biased either using the back or the top gate of the G-FET. Room temperature THz detection was demonstrated at 0.3 THz using the ADGG-GFET. The device shows a Responsivity and NEP around 2.2 mA/W and 0.04 nW/Hz0.5 respectively at respectively at 4K. It was demonstrated the practical use of the studied devices for inspection of hidden objects by using the in-house developed THz imaging system

Caractérisation électrique et modélisation du transport dans matériaux et dispositifs SOI avancés

This thesis is dedicated to the electrical characterization and transport modeling in advanced SOImaterials and devices for ultimate micro-nano-electronics. SOI technology is an efficient solution tothe technical challenges facing further downscaling and integration. Our goal was to developappropriate characterization methods and determine the key parameters. Firstly, the conventionalpseudo-MOSFET characterization was extended to heavily-doped SOI wafers and an adapted modelfor parameters extraction was proposed. We developed a nondestructive electrical method to estimatethe quality of bonding interface in metal-bonded wafers for 3D integration. In ultra-thin fully-depletedSOI MOSFETs, we evidenced the parasitic bipolar effect induced by band-to-band tunneling, andproposed new methods to extract the bipolar gain. We investigated multiple-gate transistors byfocusing on the coupling effect in inversion-mode vertical double-gate SOI FinFETs. An analyticalmodel was proposed and subsequently adapted to the full depletion region of junctionless SOI FinFETs.We also proposed a compact model of carrier profile and adequate parameter extraction techniques forjunctionless nanowires.Cette thèse est consacrée à la caractérisation et la modélisation du transport électronique dans des matériaux et dispositifs SOI avancés pour la microélectronique. Tous les matériaux innovants étudiés(ex: SOI fortement dopé, plaques obtenues par collage etc.) et les dispositifs SOI sont des solutions possibles aux défis technologiques liés à la réduction de taille et à l'intégration. Dans ce contexte,l'extraction des paramètres électriques clés, comme la mobilité, la tension de seuil et les courants de fuite est importante. Tout d'abord, la caractérisation classique pseudo-MOSFET a été étendue aux plaques SOI fortement dopées et un modèle adapté pour l'extraction de paramètres a été proposé. Nous avons également développé une méthode électrique pour estimer la qualité de l'interface de collage pour des plaquettes métalliques. Nous avons montré l'effet bipolaire parasite dans des MOSFET SOI totalement désertés. Il est induit par l’effet tunnel bande-à-bande et peut être entièrement supprimé par une polarisation arrière. Sur cette base, une nouvelle méthode a été développée pour extraire le gain bipolaire. Enfin, nous avons étudié l'effet de couplage dans le FinFET SOI double grille, en mode d’inversion. Un modèle analytique a été proposé et a été ensuite adapté aux FinFETs sans jonction(junctionless). Nous avons mis au point un modèle compact pour le profil des porteurs et des techniques d’extraction de paramètres