Direct comparison of distinct naive pluripotent states in human embryonic stem cells

Until recently, human embryonic stem cells (hESCs) were shown to exist in a state of primed pluripotency, while mouse embryonic stem cells (mESCs) display a naive or primed pluripotent state. Here we show the rapid conversion of in-house-derived primed hESCs on mouse embryonic feeder layer (MEF) to a naive state within 5-6 days in naive conversion media (NCM-MEF), 6-10 days in naive human stem cell media (NHSM-MEF) and 14-20 days using the reverse-toggle protocol (RT-MEF). We further observe enhanced unbiased lineage-specific differentiation potential of naive hESCs converted in NCM-MEF, however, all naive hESCs fail to differentiate towards functional cell types. RNA-seq analysis reveals a divergent role of PI3K/AKT/mTORC signalling, specifically of the mTORC2 subunit, in the different naive hESCs. Overall, we demonstrate a direct evaluation of several naive culture conditions performed in the same laboratory, thereby contributing to an unbiased, more in-depth understanding of different naive hESCs

Layout-level Circuit Sizing and Design-for-manufacturability Methods for Embedded RF Passive Circuits

The emergence of multi-band communications standards, and the fast pace of the consumer electronics markets for wireless/cellular applications emphasize the need for fast design closure. In addition, there is a need for electronic product designers to collaborate with manufacturers, gain essential knowledge regarding the manufacturing facilities and the processes, and apply this knowledge during the design process. In this dissertation, efficient layout-level circuit sizing techniques, and methodologies for design-for-manufacturability have been investigated. For cost-effective fabrication of RF modules on emerging technologies, there is a clear need for design cycle time reduction of passive and active RF modules. This is important since new technologies lack extensive design libraries and layout-level electromagnetic (EM) optimization of RF circuits become the major bottleneck for reduced design time. In addition, the design of multi-band RF circuits requires precise control of design specifications that are partially satisfied due to manufacturing variations, resulting in yield loss. In this work, a broadband modeling and a layout-level sizing technique for embedded inductors/capacitors in multilayer substrate has been presented. The methodology employs artificial neural networks to develop a neuro-model for the embedded passives. Secondly, a layout-level sizing technique for RF passive circuits with quasi-lumped embedded inductors and capacitors has been demonstrated. The sizing technique is based on the circuit augmentation technique and a linear optimization framework. In addition, this dissertation presents a layout-level, multi-domain DFM methodology and yield optimization technique for RF circuits for SOP-based wireless applications. The proposed statistical analysis framework is based on layout segmentation, lumped element modeling, sensitivity analysis, and extraction of probability density functions using convolution methods. The statistical analysis takes into account the effect of thermo-mechanical stress and process variations that are incurred in batch fabrication. Yield enhancement and optimization methods based on joint probability functions and constraint-based convex programming has also been presented. The results in this work have been demonstrated to show good correlation with measurement data.Ph.D.Committee Chair: Swaminathan, Madhavan; Committee Member: Fathianathan, Mervyn; Committee Member: Lim, Sung Kyu; Committee Member: Peterson, Andrew; Committee Member: Tentzeris, Mano

Electrical Design for Manufacturability Solutions: Fast Systematic Variation Analysis and Design Enhancement Techniques

The primary objectives in this research are to develop computer-aided design (CAD) tools for Design for Manufacturability (DFM) solutions that enable designers to conduct more rapid and more accurate systematic variation analysis, with different design enhancement techniques. Four main CAD tools are developed throughout my thesis. The first CAD tool facilitates a quantitative study of the impact of systematic variations for different circuits' electrical and geometrical behavior. This is accomplished by automatically performing an extensive analysis of different process variations (lithography and stress) and their dependency on the design context. Such a tool helps to explore and evaluate the systematic variation impact on any type of design. Secondly, solutions in the industry focus on the "design and then fix philosophy", or "fix during design philosophy", whereas the next CAD tool involves the "fix before design philosophy". Here, the standard cell library is characterized in different design contexts, different resolution enhancement techniques, and different process conditions, generating a fully DFM-aware standard cell library using a newly developed methodology that dramatically reduce the required number of silicon simulations. Several experiments are conducted on 65nm and 45nm designs, and demonstrate more robust and manufacturable designs that can be implemented by using the DFM-aware standard cell library. Thirdly, a novel electrical-aware hotspot detection solution is developed by using a device parameter-based matching technique since the state-of-the-art hotspot detection solutions are all geometrical based. This CAD tool proposes a new philosophy by detecting yield limiters, also known as hotspots, through the model parameters of the device, presented in the SPICE netlist. This novel hotspot detection methodology is tested and delivers extraordinary fast and accurate results. Finally, the existing DFM solutions, mainly address the digital designs. Process variations play an increasingly important role in the success of analog circuits. Knowledge of the parameter variances and their contribution patterns is crucial for a successful design process. This information is valuable to find solutions for many problems in design, design automation, testing, and fault tolerance. The fourth CAD solution, proposed in this thesis, introduces a variability-aware DFM solution that detects, analyze, and automatically correct hotspots for analog circuits

Investigating microbiomes and developing direct-fed microbials to improve cattle health

Over the last decade, global beef production has increased to meet the protein needs of the growing population. As a result, the intensification of beef cattle production systems has resulted in broad spectrum prophylactic use of antibiotics and growth promoting agents. With increased concern around antimicrobial resistance (AMR) and emergence of novel pathogenic strains of bacteria, it is critical to understand disease progression and associated changes in the microbiome to develop novel therapeutic alternatives to reduce antibiotic use and control disease. One such approach that is currently being investigated is the development of novel direct-fed microbial strains to outcompete pathogens by colonization resistance. Studies were conducted to develop a novel direct-fed microbial from the rumen to reduce the occurrence of liver abscesses in beef cattle and to investigate the progression of disease before and after an outbreak of bovine keraconjunctivitis (IBK) by longitudinal investigation of the bovine ocular microbiome. To develop direct-fed microbials against liver abscess causing microbes (Fusobacterium necrophorum necrophorum and Streptococcus bovis) in the rumen, rumen fluid was obtained from fistulated cattle and a high throughput screening approach was implemented to isolate candidate bacterial species that inhibit the growth of Fusobacterium necrophorum necrophorum and Streptococcus bovis. Following in- vitro testing two candidate strains were identified and further characterized as potential candidates to be used as alternatives to antibiotics. Additionally, a longitudinal study was conducted in a cattle population consisting of 239 calves over 4 time periods to characterize changes in the ocular microbiome by sequencing the V4 region of the 16S rRNA gene. Both alpha and beta diversity analysis demonstrated changes in the bacterial community structure of the ocular microbiome post perturbation suggesting the bovine ocular microbiome is resilient to change. Factors such as age of cattle, time post perturbation, and cattle who were infected with IBK all showed a significant difference in the bovine ocular microbiome community composition (p \u3c 0.05). Interestingly, bacteria who were deemed as “core taxa” were composed of opportunistic pathogens such as Mycoplasma spp. and Moraxella spp. Advisor: Samodha C. Fernand

Design for manufacturing (DFM) in submicron VLSI design

As VLSI technology scales to 65nm and below, traditional communication between design and manufacturing becomes more and more inadequate. Gone are the days when designers simply pass the design GDSII file to the foundry and expect very good man¬ufacturing and parametric yield. This is largely due to the enormous challenges in the manufacturing stage as the feature size continues to shrink. Thus, the idea of DFM (Design for Manufacturing) is getting very popular. Even though there is no universally accepted definition of DFM, in my opinion, one of the major parts of DFM is to bring manufacturing information into the design stage in a way that is understood by designers. Consequently, designers can act on the information to improve both manufacturing and parametric yield. In this dissertation, I will present several attempts to reduce the gap between design and manufacturing communities: Alt-PSM aware standard cell designs, printability improve¬ment for detailed routing and the ASIC design flow with litho aware static timing analysis. Experiment results show that we can greatly improve the manufacturability of the designs and we can reduce design pessimism significantly for easier design closure

DFM Techniques for the Detection and Mitigation of Hotspots in Nanometer Technology

With the continuous scaling down of dimensions in advanced technology nodes, process variations are getting worse for each new node. Process variations have a large influence on the quality and yield of the designed and manufactured circuits. There is a growing need for fast and efficient techniques to characterize and mitigate the effects of different sources of process variations on the design's performance and yield. In this thesis we have studied the various sources of systematic process variations and their effects on the circuit, and the various methodologies to combat systematic process variation in the design space. We developed abstract and accurate process variability models, that would model systematic intra-die variations. The models convert the variation in process into variation in electrical parameters of devices and hence variation in circuit performance (timing and leakage) without the need for circuit simulation. And as the analysis and mitigation techniques are studied in different levels of the design ow, we proposed a flow for combating the systematic process variation in nano-meter CMOS technology. By calculating the effects of variability on the electrical performance of circuits we can gauge the importance of the accurate analysis and model-driven corrections. We presented an automated framework that allows the integration of circuit analysis with process variability modeling to optimize the computer intense process simulation steps and optimize the usage of variation mitigation techniques. And we used the results obtained from using this framework to develop a relation between layout regularity and resilience of the devices to process variation. We used these findings to develop a novel technique for fast detection of critical failures (hotspots) resulting from process variation. We showed that our approach is superior to other published techniques in both accuracy and predictability. Finally, we presented an automated method for fixing the lithography hotspots. Our method showed success rate of 99% in fixing hotspots

Dissecting the regulatory activity and sequence content of loci with exceptional numbers of transcription factor associations

DNA-associated proteins (DAPs) classically regulate gene expression by binding to regulatory loci such as enhancers or promoters. As expanding catalogs of genome-wide DAP binding maps reveal thousands of loci that, unlike the majority of conventional enhancers and promoters, associate with dozens of different DAPs with apparently little regard for motif preference, an understanding of DAP association and coordination at such regulatory loci is essential to deciphering how these regions contribute to normal development and disease. In this study, we aggregated publicly available ChIP-seq data from 469 human DAPs assayed in three cell lines and integrated these data with an orthogonal data set of 352 nonredundant, in vitro–derived motifs mapped to the genome within DNase I hypersensitivity footprints to characterize regions with high numbers of DAP associations. We establish a generalizable definition for high occupancy target (HOT) loci and identify putative driver DAP motifs in HepG2 cells, including HNF4A, SP1, SP5, and ETV4, that are highly prevalent and show sequence conservation at HOT loci. The number of different DAPs associated with an element is positively associated with evidence of regulatory activity, and by systematically mutating 245 HOT loci with a massively parallel mutagenesis assay, we localized regulatory activity to a central core region that depends on the motif sequences of our previously nominated driver DAPs. In sum, this work leverages the increasingly large number of DAP motif and ChIP-seq data publicly available to explore how DAP associations contribute to genome-wide transcriptional regulation

Design, Fabrication, and Run-time Strategies for Hardware-Assisted Security

Today, electronic computing devices are critically involved in our daily lives, basic infrastructure, and national defense systems. With the growing number of threats against them, hardware-based security features offer the best chance for building secure and trustworthy cyber systems. In this dissertation, we investigate ways of making hardware-based security into a reality with primary focus on two areas: Hardware Trojan Detection and Physically Unclonable Functions (PUFs). Hardware Trojans are malicious modifications made to original IC designs or layouts that can jeopardize the integrity of hardware and software platforms. Since most modern systems critically depend on ICs, detection of hardware Trojans has garnered significant interest in academia, industry, as well as governmental agencies. The majority of existing detection schemes focus on test-time because of the limited hardware resources available at run-time. In this dissertation, we explore innovative run-time solutions that utilize on-chip thermal sensor measurements and fundamental estimation/detection theory to expose changes in IC power/thermal profile caused by Trojan activation. The proposed solutions are low overhead and also generalizable to many other sensing modalities and problem instances. Simulation results using state-of-the-art tools on publicly available Trojan benchmarks verify that our approaches can detect Trojans quickly and with few false positives. Physically Unclonable Functions (PUFs) are circuits that rely on IC fabrication variations to generate unique signatures for various security applications such as IC authentication, anti-counterfeiting, cryptographic key generation, and tamper resistance. While the existence of variations has been well exploited in PUF design, knowledge of exactly how variations come into existence has largely been ignored. Yet, for several decades the Design-for-Manufacturability (DFM) community has actually investigated the fundamental sources of these variations. Furthermore, since manufacturing variations are often harmful to IC yield, the existing DFM tools have been geared towards suppressing them (counter-intuitive for PUFs). In this dissertation, we make several improvements over current state-of-the-art work in PUFs. First, our approaches exploit existing DFM models to improve PUFs at physical layout and mask generation levels. Second, our proposed algorithms reverse the role of standard DFM tools and extend them towards improving PUF quality without harming non-PUF portions of the IC. Finally, since our approaches occur after design and before fabrication, they are applicable to all types of PUFs and have little overhead in terms of area, power, etc. The innovative and unconventional techniques presented in this dissertation should act as important building blocks for future work in cyber security

Numerical Simulation of Nano Scanning in Intermittent-Contact Mode AFM under Q control

We investigate nano scanning in tapping mode atomic force microscopy (AFM) under quality (Q) control via numerical simulations performed in SIMULINK. We focus on the simulation of whole scan process rather than the simulation of cantilever dynamics and the force interactions between the probe tip and the surface alone, as in most of the earlier numerical studies. This enables us to quantify the scan performance under Q control for different scan settings. Using the numerical simulations, we first investigate the effect of elastic modulus of sample (relative to the substrate surface) and probe stiffness on the scan results. Our numerical simulations show that scanning in attractive regime using soft cantilevers with high Qeff results in a better image quality. We, then demonstrate the trade-off in setting the effective Q factor (Qeff) of the probe in Q control: low values of Qeff cause an increase in tapping forces while higher ones limit the maximum achievable scan speed due to the slow response of the cantilever to the rapid changes in surface profile. Finally, we show that it is possible to achieve higher scan speeds without causing an increase in the tapping forces using adaptive Q control (AQC), in which the Q factor of the probe is changed instantaneously depending on the magnitude of the error signal in oscillation amplitude. The scan performance of AQC is quantitatively compared to that of standard Q control using iso-error curves obtained from numerical simulations first and then the results are validated through scan experiments performed using a physical set-up