Development of novel low noise switch-mode power supply designs for high fidelity audio power amplifiers.

Today, linear power supplies are widely used to provide the supply voltage rail to an audio amplifier and are considered bulky, inefficient and expensive due to the presence of various components. In particular, the typical requirements of linear designs call for physically large mains transformers, energy storage/filtering inductors and capacitors. This imposes a practical limit to the reduction of weight in audio power systems. In order to overcome these problems, Switch-mode Power Supplies (SMPS) incorporate high speed switching transistors that allow for much smaller power conversion and energy storage components to be employed. In addition the low power dissipation of the transistors in the saturated and off states results in higher efficiency, improved voltage regulation and excellent power factor ratings. The primary aim of this research was to develop and characterize a novel low noise switch mode power supply for an audio power amplifier. In this thesis, I proposed a novel balancing technique to optimize the design of SMPS that elevate the performance of converter and help to enhance the efficiency of power supply through high speed switching transistors. In fact, the proposed scheme mitigates the noise considerably in various converter topologies through different mechanisms. To validate the proposed idea, the technique is applied to different converters e.g; PFC boost converter, flyback converter and full-bridge converter. The performance of audio amplifier is evaluated using designed SMPS to compare with existing linear power supply. On the basis of experimental results, the decision has been made that the proposed balanced SMPS solution is as good as linear solution. Due to novelty and universality of balancing technique, it can provide a new path for researchers in this field to utilize the SMPS in all other audio devices by further enhancing its efficiency and reducing system noise

A Comprehensive Review on Recent Developments of LED Drivers

Background: In these recent years, LED lighting has been widely implemented for household and industrial applications. By implementing the correct topology, the performance of a LED driver can be improved in terms of efficiency, power factor, lifespan, size and cost of development. Objective: This paper aims to provide a comprehensive review on the latest trends of LED driver design to serve as a useful guide for design engineers and researchers. Result: Latest research journals and conference proceedings have been reviewed. Conclusion: There are suitable converter topologies for LED drivers of varied power levels, with the flyback converter being the most suitable for applications of less than 100W. When designing the LED driver, considerations must be made on the power factor, efficiency, dimming capability, and lifespan

GaN-Based High Efficiency Transmitter for Multiple-Receiver Wireless Power Transfer

Wireless power transfer (WPT) has attracted great attention from industry and academia due to high charging flexibility. However, the efficiency of WPT is lower and the cost is higher than the wired power transfer approaches. Efforts including converter optimization, power delivery architecture improvement, and coils have been made to increase system efficiency.In this thesis, new power delivery architectures in the WPT of consumer electronics have been proposed to improve the overall system efficiency and increase the power density.First, a two-stage transmitter architecture is designed for a 100 W WPT system. After comparing with other topologies, the front-end ac-dc power factor correction (PFC) rectifier employs a totem-pole rectifier. A full bridge 6.78 MHz resonant inverter is designed for the subsequent stage. An impedance matching network provides constant transmitter coil current. The experimental results verify the high efficiency, high PF, and low total harmonic distortion (THD).Then, a single-stage transmitter is derived based on the verified two-stage structure. By integration of the PFC rectifier and full bridge inverter, two GaN FETs are saved and high efficiency is maintained. The integrated DCM operated PFC rectifier provides high PF and low THD. By adopting a control scheme, the transmitter coil current and power are regulated. A simple auxiliary circuit is employed to improve the light load efficiency. The experimental results verify the achievement of high efficiency.A closed-loop control scheme is implemented in the single-stage transmitter to supply multiple receivers simultaneously. With a controlled constant transmitter current, the system provides a smooth transition during dynamically load change. ZVS detection circuit is proposed to protect the transmitter from continuous hard switching operation. The control scheme is verified in the experiments.The multiple-reciever WPT system with the single-stage transmitter is investigated. The system operating range is discussed. The method of tracking optimum system efficiency is studied. The system control scheme and control procedure, targeting at providing a wide system operating range, robust operation and capability of tracking the optimized system efficiency, are proposed. Experiment results demonstrate the WPT system operation

Passive and Active Topologies Investigation for LED Driver Circuits

In this chapter, a survey of LED driver circuits is presented. The driver circuit is a crucial component in the LED light system. It provides the correct voltage and current values for the best brightness and long life. Furthermore, the driver circuits contribute to obtaining high efficiency and reliability light system. Several lighting applications need different driver topologies that meet the use requirement and the energy sources available. In actual applications, passive and active circuits are implemented to satisfy the LED driver electrical requirements and cost-effective demands. The LED driver circuits investigation evaluate the issues and the solutions in the LED lighting systems connected to a DC source such as a battery or AC line. The AC line connection requisites such as the power factor correction and the harmonic distortion are dealt with both the driver topology and control optimization. Also, the volume reduction need is examined in the circuitry choice. Moreover, the different topologies of the power converters isolated and not isolated used in the driver circuits based on both the power request and supply source are described and critically evaluated

Control method, circuit topology, and power architecture for high-performance single-phase AC/DC conversion.

This thesis explores new approaches, including a new control method, a new power factor correction (PFC) front-end topology, and two power architectures to improve the performance of AC–DC power converters

Control method, circuit topology, and power architecture for high-performance single-phase AC/DC conversion.

This thesis explores new approaches, including a new control method, a new power factor correction (PFC) front-end topology, and two power architectures to improve the performance of AC–DC power converters

A Class-E-Based Resonant AC-DC Converter With Inherent PFC Capability

This paper investigates the use of the class-E inverter for power factor correction (PFC) applications. Analytical and state-space models are derived showing the class-E inverter’s capability of achieving inherent PFC operation with a constant duty cycle. The inherent PFC operation limits the controller responsibility to the regulation of the output voltage, which is key for resonant converters with challenging control. A converter incorporating a diode bridge, a class-E inverter, and a class-D rectifier is presented for the PFC stage in single-phase offline converters. A prototype is designed to validate the analysis and presented design method. The prototype operates with zero-voltage switching (ZVS) across the load range and achieves up to 211 W of output power at an efficiency of 88%, with an inherent power factor of 0.99 and a total harmonic distortion (THD) of 8.8 %. Frequency modulation is used to achieve lower output power down to 25 W, with a power factor of 0.95, THD of 28 %, and an efficiency of 88 %

Survey on Photo-Voltaic Powered Interleaved Converter System

Renewable energy is the best solution to meet the growing demand for energy in the country. The solar energy is considered as the most promising energy by the researchers due to its abundant availability, eco-friendly nature, long lasting nature, wide range of application and above all it is a maintenance free system. The energy absorbed by the earth can satisfy 15000 times of today’s total energy demand and its hundred times more than that our conventional energy like coal and other fossil fuels. Though, there are overwhelming advantages in solar energy, It has few drawbacks as well such as its low conversion ratio, inconsistent supply of energy due to variation in the sun light, less efficiency due to ripples in the converter, time dependent and, above all, high capitation cost. These aforementioned flaws have been addressed by the researchers in order to extract maximum energy and attain hundred percentage benefits of this heavenly resource. So, this chapter presents a comprehensive investigation based on photo voltaic (PV) system requirements with the following constraints such as system efficiency, system gain, dynamic response, switching losses are investigated. The overview exhibits and identifies the requirements of a best PV power generation system

New leading/trailing edge modulation strategies for two-stage AC/DC PFC adapters to reduce DC-link capacitor ripple current

AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis