Duplicated Control Unit Based Embedded Fault-masking Systems

Fault-masking architectures are classified into a few major categories. The first is the multiplication of the microcontroller, the other is a CON-MON architecture (not a full-fledged fault-masking system), there is of course, the multiplication of frequently failing units. In this article, the focus is on the different kind of solutions, how can a duplicated microcontroller based system, monitoring itself, and increasing the fault-tolerance level of the embedded system

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

ESMD Space Grant Faculty Project

No abstract availabl

ESMD Space Grant Faculty Report

The strength of the Exploration Systems Mission Directorate ESMD Faculty Project lies in its ability to meet National Aeronautics Space Administration NASA's Strategic Educational Outcome 1 by developing a sustainable and long-term integration of student involvement at academic institutions with all NASA Centers. This outcome is achieved by a three-fold approach: 1) by collecting Senior Design projects pertaining to Constellation work performed at each of the ten NASA Centers, 2) by engaging students at Minority Serving Institutions in the art of systems engineering and systems design of technologies required for space exploration, and 3) by identifying potential internships at each Center relative to exploration that provide students who are supported by their institutional Space Grant to engage in on-going mission-level and explorative systems designs. The objectives of the ESMD Faculty Project are to: 1. Aid the Centers (both Education Offices and associated technical organizations) in providing relevant opportunities for the ESMD Space Grant Program to support student and faculty in Senior Design projects 2. Enable better matches between the ESMD work required and what the Space Grant Consortia can do to effectively contribute to NASA programs 3. Provide the Space Grant Consortia an opportunity to strengthen relations with the NASA Centers 4. Develop better collective understanding of the U.S. Space Exploration Policy by the Center, Space Grant, faculty, Education Office, and students 5. Enable Space Grant institution faculty to better prepare their students to meet current and future NASA needs 6. Enable the Center Education Offices to strengthen their ties to their technical organizations and Space Grant Consortia 7. Aid KSC in gaining a greater and more detailed understanding of each of the Center activities Senior Design projects are intended to stimulate undergraduate students on current NASA activities related to lunar, Mars, and other planetary missions and to bring out innovative and novel ideas that can be used to complement those currently under development at respective NASA Centers. Additionally, such academic involvement would better the prospects for graduating seniors to pursue graduate studies and to seek careers in the space industry with a strong sense for systems engineering and understanding of design concepts. Internships, on the other hand, are intended to provide hands-on experience to students by engaging them in diverse state-of-the-art technology development, prototype bread-boarding, computer modeling and simulations, hardware and software testing, and other activities that provide students a strong perspective of NASA's vision and mission in enhancing the knowledge of Earth and space planetary sciences. Ten faculty members, each from a Space Grant Consortium-affiliated university, worked at ten NASA Centers for five weeks between June 2 and July 3, 2008. The project objectives listed above were achieved. In addition to collecting data on Senior Design ideas and identifying possible internships that would benefit NASA/ESMD, the faculty fellows promoted and collected data when required for other ESMD-funded programs and helped the Center's Education Office, as,needed.

Adaptation in Standard CMOS Processes with Floating Gate Structures and Techniques

We apply adaptation into ordinary circuits and systems to achieve high performance, high quality results. Mismatch in manufactured VLSI devices has been the main limiting factor in quality for many analog and mixed-signal designs. Traditional compensation methods are generally costly. A few examples include enlarging the device size, averaging signals, and trimming with laser. By applying floating gate adaptation to standard CMOS circuits, we demonstrate here that we are able to trim CMOS comparator offset to a precision of 0.7mV, reduce CMOS image sensor fixed-pattern noise power by a factor of 100, and achieve 5.8 effective number of bits (ENOB) in a 6-bit flash analog-to-digital converter (ADC) operating at 750MHz. The adaptive circuits generally exhibit special features in addition to an improved performance. These special features are generally beyond the capabilities of traditional CMOS design approaches and they open exciting opportunities in novel circuit designs. Specifically, the adaptive comparator has the ability to store an accurate arbitrary offset, the image sensor can be set up to memorize previously captured scenes like a human retina, and the ADC can be configured to adapt to the incoming analog signal distribution and perform an efficient signal conversion that minimizes distortion and maximizes output entropy