813 research outputs found

    Working Notes from the 1992 AAAI Spring Symposium on Practical Approaches to Scheduling and Planning

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    The symposium presented issues involved in the development of scheduling systems that can deal with resource and time limitations. To qualify, a system must be implemented and tested to some degree on non-trivial problems (ideally, on real-world problems). However, a system need not be fully deployed to qualify. Systems that schedule actions in terms of metric time constraints typically represent and reason about an external numeric clock or calendar and can be contrasted with those systems that represent time purely symbolically. The following topics are discussed: integrating planning and scheduling; integrating symbolic goals and numerical utilities; managing uncertainty; incremental rescheduling; managing limited computation time; anytime scheduling and planning algorithms, systems; dependency analysis and schedule reuse; management of schedule and plan execution; and incorporation of discrete event techniques

    The 1990 progress report and future plans

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    This document describes the progress and plans of the Artificial Intelligence Research Branch (RIA) at ARC in 1990. Activities span a range from basic scientific research to engineering development and to fielded NASA applications, particularly those applications that are enabled by basic research carried out at RIA. Work is conducted in-house and through collaborative partners in academia and industry. Our major focus is on a limited number of research themes with a dual commitment to technical excellence and proven applicability to NASA short, medium, and long-term problems. RIA acts as the Agency's lead organization for research aspects of artificial intelligence, working closely with a second research laboratory at JPL and AI applications groups at all NASA centers

    MEERA: Cross-Layer Methodology for Energy Efficient Resource Allocation in Wireless Networks

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    In many portable devices, wireless network interfaces consume upwards of 30% of scarce system energy. Reducing the transceiver’s power consumption to extend the system lifetime has therefore become a design goal. Our work is targated at this goal and is based on the following two observations. First, conventional energy management approaches have focused independently on minimizing the fixed energy cost (by shutdown) and on scalable energy costs (by leveraging, for example, the modulation, code-rate and transmission power). These two energy management approaches present a tradeoff. For example, lower modulation rates and transmission power minimize the variable energy component, but this shortens the sleep duration thereby increasing fixed energy consumption. Second, in order to meet the Quality of Service (QoS) timeliness requirements for multiple users, we need to determine to what extent each system in the network may sleep and scale. Therefore, we propose a two-phase methodology that resolves the sleep-scaling tradeoff across the physical, communications and link layers at design time and schedules nodes at runtime with near optimal energy-efficient configurations in the solution space. As a result, we are able to achieve very low run-time overheads. Our methodology is applied to a case study on delivering a guaranteed QoS for multiple users with MPEG-4 video over a slow-fading channel. By exploiting runtime controllable parameters of actual RF components and a modified 802.11 Medium Access Controller, system lifetime is increased by a factor of 3-to-10 in comparison with conventional techniques

    Optimization of duty cycles in magnetic resonance imaging systems

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    About 30 years ago the first commercial Magnetic Resonance Imaging (MRI) scanner was installed at the Hammersmith Hospital in London. This revolutionary technique made it possible to image tissues surrounded by bone. This was a big advantage in comparison to X-ray based imaging methods. However, resolution of the first magnetic resonance images was low and the scanning time was long, due to problems of weak signal and high sensitivity to the patient motion. Since then a lot of research has been done to improve the overall performance of the machines. In mid 90s fast imaging techniques were developed that had a tremendous impact on the popularity of MRI among other medical imaging methods. Nowadays there are a lot of clinical imaging applications where MRI overtakes the X-ray successors. Moreover, MRI is believed to be harmless to the patient, because no ionizing radiation is utilized. However, the main disadvantages of MRI are strong magnetic field, extreme expense, and relatively long examination time when compared to X-ray. The first factor imposes high safety standards that must be respected in an MRI scanner room, whereas the last two factors prevent hospitals from fast investments return. Moreover, due to high demand on MRI examinations, the patient waiting lists in hospitals are often several weeks long. This backlog decreases patient satisfaction. In this dissertation, a new approach to reduce the examination time of MRI systems is described. The time reduction is accomplished by dividing parts of the MRI examination into segments that are then intermixed. The intermixing algorithms are based on scheduling technique from the field of Operations Research. There are a number of physical parameters that restrict performance of MRI systems, such as temperature of MRI hardware during the examination. Also, due to electromagnetic effects inside the bore of MRI scanner, the temperature of patient’s body can get close to an uncomfortable level. In current practice, all these duty cycle limitations are modeled and verified before the MRI examination starts. Then, if necessary, the MRI examination time is prolongated, in order not to exceed the temperature limits. Typical MRI examination consists of several discrete parts, i.e., scans. Different types of scans impose different duty cycle limitations. The approach proposes that the examination can be divided into small segments that are rescheduled in such a way that the adverse effects of duty cycle limited scans are reduced by non-limited scans. In this thesis, several scheduling algorithms are described that were designed to deal with different kinds of duty cycle limitations and to improve performance of MRI systems. The algorithms were verified on a large number of MRI examinations. According to collected statistics, time of MRI examinations can be reduced by up to 22%. As a result, the capacity of one MRI system can be increased by up to 4 patients per day. Moreover, special MRI experiments were carried out to validate the algorithms. Finally, the thesis presents an approach to patient flow modeling in MRI departments in hospitals. The patient flow is modeled by means of queuing theory in order to uncover bottlenecks. Then, discrete-event computer simulations are performed to overcome limitations of the classical queuing theory assumptions. The current hospitals practice demonstrates that the MRI scanners are not always the bottleneck in the overall examinations workflow. The resulting models can be utilized to predict patient flow for various layouts of MRI departments and appointment scheduling strategies. Based on these detailed models, recommendations on improving MRI departments’ workflow can be derived. The results of this study can be used to optimize performance of MRI departments in hospitals or free-standing imaging centers. First, the MRI scanning time can be reduced. Second, the patient flow can be optimized that yields the overall MRI examination time reduction. This will result in better patient comfort and faster return on investments in MRI equipment. The research described in this thesis was carried out as a part of the DARWIN project at Philips Healthcare under the responsibilities of the Embedded Systems Institute (ESI). This project is partially supported by the Dutch Ministry of Economic Affairs under the BSIK program

    Minimizing the overlap problem in protein NMR: a computational framework for precision amino acid labeling

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    Motivation: Recent advances in cell-free protein expression systems allow specific labeling of proteins with amino acids containing stable isotopes (¹⁵N, ¹³C and ²H), an important feature for protein structure determination by nuclear magnetic resonance (NMR) spectroscopy. Given this labeling ability, we present a mathematical optimization framework for designing a set of protein isotopomers, or labeling schedules, to reduce the congestion in the NMR spectra. The labeling schedules, which are derived by the optimization of a cost function, are tailored to a specific protein and NMR experiment. Results: For 2D ¹⁵N-¹H HSQC experiments, we can produce an exact solution using a dynamic programming algorithm in under 2 h on a standard desktop machine. Applying the method to a standard benchmark protein, calmodulin, we are able to reduce the number of overlaps in the 500 MHZ HSQC spectrum from 10 to 1 using four samples with a true cost function, and 10 to 4 if the cost function is derived from statistical estimates. On a set of 448 curated proteins from the BMRB database, we are able to reduce the relative percent congestion by 84.9% in their HSQC spectra using only four samples. Our method can be applied in a high-throughput manner on a proteomic scale using the server we developed. On a 100-node cluster, optimal schedules can be computed for every protein coded for in the human genome in less than a month. Availability: A server for creating labeling schedules for ¹⁵N-¹H HSQC experiments as well as results for each of the individual 448 proteins used in the test set is available at http://nmr.proteomics.ics.uci.edu

    Logic programming for deliberative robotic task planning

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    Over the last decade, the use of robots in production and daily life has increased. With increasingly complex tasks and interaction in different environments including humans, robots are required a higher level of autonomy for efficient deliberation. Task planning is a key element of deliberation. It combines elementary operations into a structured plan to satisfy a prescribed goal, given specifications on the robot and the environment. In this manuscript, we present a survey on recent advances in the application of logic programming to the problem of task planning. Logic programming offers several advantages compared to other approaches, including greater expressivity and interpretability which may aid in the development of safe and reliable robots. We analyze different planners and their suitability for specific robotic applications, based on expressivity in domain representation, computational efficiency and software implementation. In this way, we support the robotic designer in choosing the best tool for his application

    Run-time management for future MPSoC platforms

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    In recent years, we are witnessing the dawning of the Multi-Processor Systemon- Chip (MPSoC) era. In essence, this era is triggered by the need to handle more complex applications, while reducing overall cost of embedded (handheld) devices. This cost will mainly be determined by the cost of the hardware platform and the cost of designing applications for that platform. The cost of a hardware platform will partly depend on its production volume. In turn, this means that ??exible, (easily) programmable multi-purpose platforms will exhibit a lower cost. A multi-purpose platform not only requires ??exibility, but should also combine a high performance with a low power consumption. To this end, MPSoC devices integrate computer architectural properties of various computing domains. Just like large-scale parallel and distributed systems, they contain multiple heterogeneous processing elements interconnected by a scalable, network-like structure. This helps in achieving scalable high performance. As in most mobile or portable embedded systems, there is a need for low-power operation and real-time behavior. The cost of designing applications is equally important. Indeed, the actual value of future MPSoC devices is not contained within the embedded multiprocessor IC, but in their capability to provide the user of the device with an amount of services or experiences. So from an application viewpoint, MPSoCs are designed to ef??ciently process multimedia content in applications like video players, video conferencing, 3D gaming, augmented reality, etc. Such applications typically require a lot of processing power and a signi??cant amount of memory. To keep up with ever evolving user needs and with new application standards appearing at a fast pace, MPSoC platforms need to be be easily programmable. Application scalability, i.e. the ability to use just enough platform resources according to the user requirements and with respect to the device capabilities is also an important factor. Hence scalability, ??exibility, real-time behavior, a high performance, a low power consumption and, ??nally, programmability are key components in realizing the success of MPSoC platforms. The run-time manager is logically located between the application layer en the platform layer. It has a crucial role in realizing these MPSoC requirements. As it abstracts the platform hardware, it improves platform programmability. By deciding on resource assignment at run-time and based on the performance requirements of the user, the needs of the application and the capabilities of the platform, it contributes to ??exibility, scalability and to low power operation. As it has an arbiter function between different applications, it enables real-time behavior. This thesis details the key components of such an MPSoC run-time manager and provides a proof-of-concept implementation. These key components include application quality management algorithms linked to MPSoC resource management mechanisms and policies, adapted to the provided MPSoC platform services. First, we describe the role, the responsibilities and the boundary conditions of an MPSoC run-time manager in a generic way. This includes a de??nition of the multiprocessor run-time management design space, a description of the run-time manager design trade-offs and a brief discussion on how these trade-offs affect the key MPSoC requirements. This design space de??nition and the trade-offs are illustrated based on ongoing research and on existing commercial and academic multiprocessor run-time management solutions. Consequently, we introduce a fast and ef??cient resource allocation heuristic that considers FPGA fabric properties such as fragmentation. In addition, this thesis introduces a novel task assignment algorithm for handling soft IP cores denoted as hierarchical con??guration. Hierarchical con??guration managed by the run-time manager enables easier application design and increases the run-time spatial mapping freedom. In turn, this improves the performance of the resource assignment algorithm. Furthermore, we introduce run-time task migration components. We detail a new run-time task migration policy closely coupled to the run-time resource assignment algorithm. In addition to detailing a design-environment supported mechanism that enables moving tasks between an ISP and ??ne-grained recon??gurable hardware, we also propose two novel task migration mechanisms tailored to the Network-on-Chip environment. Finally, we propose a novel mechanism for task migration initiation, based on reusing debug registers in modern embedded microprocessors. We propose a reactive on-chip communication management mechanism. We show that by exploiting an injection rate control mechanism it is possible to provide a communication management system capable of providing a soft (reactive) QoS in a NoC. We introduce a novel, platform independent run-time algorithm to perform quality management, i.e. to select an application quality operating point at run-time based on the user requirements and the available platform resources, as reported by the resource manager. This contribution also proposes a novel way to manage the interaction between the quality manager and the resource manager. In order to have a the realistic, reproducible and ??exible run-time manager testbench with respect to applications with multiple quality levels and implementation tradev offs, we have created an input data generation tool denoted Pareto Surfaces For Free (PSFF). The the PSFF tool is, to the best of our knowledge, the ??rst tool that generates multiple realistic application operating points either based on pro??ling information of a real-life application or based on a designer-controlled random generator. Finally, we provide a proof-of-concept demonstrator that combines these concepts and shows how these mechanisms and policies can operate for real-life situations. In addition, we show that the proposed solutions can be integrated into existing platform operating systems
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