19,120 research outputs found

    Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study

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    This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber line specifications, i.e 12-bit resolution within a 20-MHz signal bandwidth. These modulators have been synthesized using a new methodology that is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. This method allows to place the zeroes/poles of the loop-filter transfer function in an optimal way and to reduce the number of analog components, namely, transconductors and/or amplifiers, resistors, capacitors and digital-to-analog converters. This leads to more efficient topologies in terms of circuitry complexity, power consumption and robustness with respect to circuit non-idealities. A comparison study of the synthesized architectures is done considering their sensitivity to most critical circuit error mechanisms. Time-domain behavioral simulations are shown to validate the presented approach.Ministerio de Educación y Ciencia TEC2004-01752/MI

    A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators

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    Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, SpainThis paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade Σ∆ modulators. The salient features of this methodology ar e: (a) flexible behavioral modeling for optimum accuracy- efficiency trade-offs at different stages of the top-down synthesis process; (b) direct synthesis in the continuous-time domain for minimum circuit complexity and sensitivity; a nd (c) mixed knowledge-based and optimization-based architec- tural exploration and specification transmission for enhanced circuit performance. The applicability of this methodology will be illustrated via the design of a 12 bit 20 MHz CT Σ∆ modulator in a 1.2V 130nm CMOS technology.Ministerio de Ciencia y Educación TEC2004-01752/MICMinisterio de Industria, Turismo y Comercio FIT-330100-2006-134 SPIRIT Projec

    A describing function study of saturated quantization and its application to the stability analysis of multi-bit sigma delta modulators

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    Just as their single-bit counterparts, multi-bit sigma delta modulators exhibit nonlinear behavior due to the presence of the quantizer in the loop. In the multi-bit case this is caused by the fact that any quantizer has a limited output range and hence gives an implicit saturation effect. Due to this, any multi-bit modulator is prone to modulator overloading. Unfortunately, until now, designers had to rely on extensive time-domain simulations to predict the overloading level, because there is no adequate analytical theory to model this effect. In this work, we have developed such an analytical theory based on multiple input describing function analysis. This way, we obtained expressions for the signal gain, the noise gain and the variance of the quantization noise. Here, both the case of DC as well as sinusoidal signals was considered. These results were used for the stability analysis of multi-bit Sigma Delta modulators, which allows to predict the overloading level. Code implementing the proposed expressions is available for download at http://cas1.elis.ugent. be/cas/en/download

    A rigorous approach to the robust design of continuous-time ΣΔ modulators

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    In this paper we present a framework for robust design of continuous-time Sigma Delta modulators. The approach allows to find a modulator which maintains its performance ( stability, guaranteed peak SNR, ...) over all the foreseen parasitic effects, provided it exists. For this purpose, we have introduced the S-figure as a criterion for the robustness of a continuous-time Sigma Delta modulator. This figure, inspired by the worst-case-distance methodology, indicates how close a design is to violating one of its performance requirements. Optimal robustness is obtained by optimizing this S-figure. The approach is illustrated through various design examples and is able to find modulators that are robust to excess loop delay, clock jitter and coefficient variations. As an application of the approach, we have quantified the effect of coefficient trimming. Even with poor trim resolution, good performance can be achieved provided beneficial initial system parameters are chosen. Another example illustrates the fact that also the out-of-band peaking behavior of the signal transfer function can be controlled with our design framework

    True high-order VCO-based ADC

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    A novel approach to use a voltage-controlled oscillator (VCO) as the first integrator of a high-order continuous-time delta-sigma modulator (CT-DSM) is presented. In the proposed architecture, the VCO is combined with a digital up-down counter to implement the first integrator of the CT-DSM. Thus, the first integrator is digital-friendly and hence can maximally benefit from technological scaling

    Generation of tunable, high repetition rate optical frequency combs using on-chip silicon modulators

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    We experimentally demonstrate tunable, highly-stable frequency combs with high repetition-rates using a single, charge injection based silicon PN modulator. In this work, we demonstrate combs in the C-band with over 8 lines in a 20-dB bandwidth. We demonstrate continuous tuning of the center frequency in the C-band and tuning of the repetition-rate from 7.5GHz to 12.5GHz. We also demonstrate through simulations the potential for bandwidth scaling using an optimized silicon PIN modulator. We find that, the time varying free carrier absorption due to carrier injection, an undesirable effect in data modulators, assists here in enhancing flatness in the generated combs.Comment: 10 pages, 7 figure

    Development of a broadband and squint-free Ku-band phased array antenna system for airborne satellite communications

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    Novel avionic communication systems are required for various purposes, for example to increase the flight safety and operational integrity as well as to enhance the quality of service to passengers on board. To serve these purposes, a key technology that is essential to be developed is an antenna system that can provide broadband connectivity within aircraft cabins at an affordable price. Currently, in the European Commission (EC) 7th Framework Programme SANDRA project (SANDRA, 2011), a development of such an antenna system is being carried out. The system is an electronically-steered phased-array antenna (PAA) with a low aerodynamic profile. The reception of digital video broadcasting by satellite (DVB-S) signal which is in the frequency range of 10.7-12.75 GHz (Ku-band) is being considered. In order to ensure the quality of service provided to the passengers, the developed antenna should be able to receive the entire DVB-S band at once while complying with the requirements of the DVB-S system (Morello & Mignone, 2006). These requirements, as will be explained later, dictate a broadband antenna system where the beam is squint-free, i.e. no variation of beam pointing direction for all the frequencies in the desired band. Additionally, to track the satellite, the seamless tunability of the beam pointing direction of this antenna is also required. In this work, a concept of optical beamforming (Riza & Thompson, 1997) is implemented to provide a squint-free beam over the entire Ku-band for all the desired pointing directions. The optical beamformer itself consists of continuously tunable optical delay lines that enable seamless tunability of the beam pointing direction

    Analysis of VCO based noise shaping ADCs linearized by PWM modulation

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    Nonlinearity is one of the main problems associated with VCO based noise shaping ADCs. Their open loop architecture does not permit correction of the nonlinear voltage to frequency response of the VCO by feedback. Recently, linearization of a VCO ADC by Pulse Width Modulation (PWM) precoding has been proposed. Here, the input signal is encoded by a PWM modulator to drive the VCO with a 2-level signal, thus eliminating the nonlinearity of the VCO. This paper analyzes the remaining inherent distortion in such modulators which originates from subsampling the PWM sidebands
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