Hypernode reduction modulo scheduling

Software pipelining is a loop scheduling technique that extracts parallelism from loops by overlapping the execution of several consecutive iterations. Most prior scheduling research has focused on achieving minimum execution time, without regarding register requirements. Most strategies tend to stretch operand lifetimes because they schedule some operations too early or too late. The paper presents a novel strategy that simultaneously schedules some operations late and other operations early, minimizing all the stretchable dependencies and therefore reducing the registers required by the loop. The key of this strategy is a pre-ordering that selects the order in which the operations will be scheduled. The results show that the method described in this paper performs better than other heuristic methods and almost as well as a linear programming method but requiring much less time to produce the schedules.Peer ReviewedPostprint (published version

Project scheduling under uncertainty using fuzzy modelling and solving techniques

In the real world, projects are subject to numerous uncertainties at different levels of planning. Fuzzy project scheduling is one of the approaches that deal with uncertainties in project scheduling problem. In this paper, we provide a new technique that keeps uncertainty at all steps of the modelling and solving procedure by considering a fuzzy modelling of the workload inspired from the fuzzy/possibilistic approach. Based on this modelling, two project scheduling techniques, Resource Constrained Scheduling and Resource Leveling, are considered and generalized to handle fuzzy parameters. We refer to these problems as the Fuzzy Resource Constrained Project Scheduling Problem (FRCPSP) and the Fuzzy Resource Leveling Problem (FRLP). A Greedy Algorithm and a Genetic Algorithm are provided to solve FRCPSP and FRLP respectively, and are applied to civil helicopter maintenance within the framework of a French industrial project called Helimaintenance

A heuristic methodology for solving spatial aresource-constrained project scheduling problems.

In this paper we present a heuristic methodology for solving resource-constrained project scheduling problems with renewable and spatial resources. We especially concentrate on spatial resources that are encountered in construction projects, but our analysis can easily be generalized to other sectors. Our methodology is based on the application of a schedule generation scheme on apriority list of activities. We explain why the parallel schedule generation scheme is not applicable for projects with spatial resources. We introduce a procedure for transforming priority lists into precedence and resource feasible lists that avoid deadlocks on the spatial resources. We conclude from a computational experiment on two sets of instances that priority rules performing well for the regular resource-constrained project scheduling problem also perform well in the presence of spatial resources and allow to effectively solve large problems in very short CPU time.Construction; Resource-constrained project scheduling; Spatial resources; Heuristic; Project scheduling; Scheduling; Problems; Sector; Rules; Time;

Exact and heuristic reactive planning procedures for multi-mode resource-constrained projects.

The multi-mode resource-constrained project scheduling problem (MRCPSP) involves the determination of a baseline schedule of the project activities, which can be executed in multiple modes, satisfying the precedence relations and resource constraints while minimizing the project duration. During the execution of the project, the baseline schedule may become infeasible due to activity duration and resource disruptions. We propose and evaluate a number of dedicated exact reactive scheduling procedures as well as a tabu search heuristic for repairing a disrupted schedule. We report on promising computational results obtained on a set of benchmark problems.Project scheduling; Uncertainty; Reactive scheduling; Multi-mode RCPSP;

Control Aware Radio Resource Allocation in Low Latency Wireless Control Systems

We consider the problem of allocating radio resources over wireless communication links to control a series of independent wireless control systems. Low-latency transmissions are necessary in enabling time-sensitive control systems to operate over wireless links with high reliability. Achieving fast data rates over wireless links thus comes at the cost of reliability in the form of high packet error rates compared to wired links due to channel noise and interference. However, the effect of the communication link errors on the control system performance depends dynamically on the control system state. We propose a novel control-communication co-design approach to the low-latency resource allocation problem. We incorporate control and channel state information to make scheduling decisions over time on frequency, bandwidth and data rates across the next-generation Wi-Fi based wireless communication links that close the control loops. Control systems that are closer to instability or further from a desired range in a given control cycle are given higher packet delivery rate targets to meet. Rather than a simple priority ranking, we derive precise packet error rate targets for each system needed to satisfy stability targets and make scheduling decisions to meet such targets while reducing total transmission time. The resulting Control-Aware Low Latency Scheduling (CALLS) method is tested in numerous simulation experiments that demonstrate its effectiveness in meeting control-based goals under tight latency constraints relative to control-agnostic scheduling

Running real time distributed simulations under Linux and CERTI

This paper presents some experiments and some results to enforce real time distributed simulations in accordance with the High Level Architecture (HLA). Simulations were run by using CERTI, an open source middleware, as the Run Time Infrastructure (RTI). Models were distributed over computers under various available versions of the 2.6 Linux kernel. Studies and experiments relied on a real case study. The chosen case study was the simulation of an "in formation" flight of observation satellites. This case study brings up some real applicative needs in real time distributed simulations and real configurations of simulators and models. Two simulations of "in formation" flight of satellites were studied. The study consisted in modeling the behaviour of the simulators and in running these models by using various kernel or middleware operating mechanisms and services. Time measurements were performed at each test giving some results on the ability of the simulation to meet its real time requirements

Survey on Combinatorial Register Allocation and Instruction Scheduling

Register allocation (mapping variables to processor registers or memory) and instruction scheduling (reordering instructions to increase instruction-level parallelism) are essential tasks for generating efficient assembly code in a compiler. In the last three decades, combinatorial optimization has emerged as an alternative to traditional, heuristic algorithms for these two tasks. Combinatorial optimization approaches can deliver optimal solutions according to a model, can precisely capture trade-offs between conflicting decisions, and are more flexible at the expense of increased compilation time. This paper provides an exhaustive literature review and a classification of combinatorial optimization approaches to register allocation and instruction scheduling, with a focus on the techniques that are most applied in this context: integer programming, constraint programming, partitioned Boolean quadratic programming, and enumeration. Researchers in compilers and combinatorial optimization can benefit from identifying developments, trends, and challenges in the area; compiler practitioners may discern opportunities and grasp the potential benefit of applying combinatorial optimization

A Comparative Study of Scheduling Techniques for Multimedia Applications on SIMD Pipelines

Parallel architectures are essential in order to take advantage of the parallelism inherent in streaming applications. One particular branch of these employ hardware SIMD pipelines. In this paper, we analyse several scheduling techniques, namely ad hoc overlapped execution, modulo scheduling and modulo scheduling with unrolling, all of which aim to efficiently utilize the special architecture design. Our investigation focuses on improving throughput while analysing other metrics that are important for streaming applications, such as register pressure, buffer sizes and code size. Through experiments conducted on several media benchmarks, we present and discuss trade-offs involved when selecting any one of these scheduling techniques.Comment: Presented at DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (arXiv:1502.07241

Minimisation of energy consumption variance for multi-process manufacturing lines through genetic algorithm manipulation of production schedule

Typical manufacturing scheduling algorithms do not consider the energy consumption of each job, or its variance, when they generate a production schedule. This can become problematic for manufacturers when local infrastructure has limited energy distribution capabilities. In this paper, a genetic algorithm based schedule modification algorithm is presented. By referencing energy consumption models for each job, adjustments are made to the original schedule so that it produces a minimal variance in the total energy consumption in a multi-process manufacturing production line, all while operating within the constraints of the manufacturing line and individual processes. Empirical results show a significant reduction in energy consumption variance can be achieved on schedules containing multiple concurrent jobs