13,754 research outputs found

    A Survey of Prediction and Classification Techniques in Multicore Processor Systems

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    In multicore processor systems, being able to accurately predict the future provides new optimization opportunities, which otherwise could not be exploited. For example, an oracle able to predict a certain application\u27s behavior running on a smart phone could direct the power manager to switch to appropriate dynamic voltage and frequency scaling modes that would guarantee minimum levels of desired performance while saving energy consumption and thereby prolonging battery life. Using predictions enables systems to become proactive rather than continue to operate in a reactive manner. This prediction-based proactive approach has become increasingly popular in the design and optimization of integrated circuits and of multicore processor systems. Prediction transforms from simple forecasting to sophisticated machine learning based prediction and classification that learns from existing data, employs data mining, and predicts future behavior. This can be exploited by novel optimization techniques that can span across all layers of the computing stack. In this survey paper, we present a discussion of the most popular techniques on prediction and classification in the general context of computing systems with emphasis on multicore processors. The paper is far from comprehensive, but, it will help the reader interested in employing prediction in optimization of multicore processor systems

    Modeling of thermally induced skew variations in clock distribution network

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    Clock distribution network is sensitive to large thermal gradients on the die as the performance of both clock buffers and interconnects are affected by temperature. A robust clock network design relies on the accurate analysis of clock skew subject to temperature variations. In this work, we address the problem of thermally induced clock skew modeling in nanometer CMOS technologies. The complex thermal behavior of both buffers and interconnects are taken into account. In addition, our characterization of the temperature effect on buffers and interconnects provides valuable insight to designers about the potential impact of thermal variations on clock networks. The use of industrial standard data format in the interface allows our tool to be easily integrated into existing design flow

    Thermal measurement and modeling of multi-die packages

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    Thermal measurement and modeling of multi-die packages became a hot topic recently in different fields like RAM chip packaging or LEDs / LED assemblies, resulting in vertical (stacked) and lateral arrangement. In our present study we show results for a mixed arrangement: an opto-coupler device has been investigated with 4 chips in lateral as well as vertical arrangement. In this paper we give an overview of measurement and modeling techniques and results for stacked and MCM structures, describe our present measurement results together with our structure function based methodology of validating the detailed model of the package being studied. Also, we show how to derive junction-to-pin thermal resistances with a technique using structure functions.Comment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions
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