A teaching and support tool for building formal models of graphical user-interfaces

In this paper we propose the design of a tool that will allow the construction of a formal, textual description of a software system even if it has a graphical user-interface as a component. An important aspect of this design is that it can be used for two purposes-the teaching of first-order logic and the formal specification of graphical user-interfaces. The design has been suggested by considering a system that has already been very successful for teaching first-order logic, namely Tarski's World

Comparison of DC motor speed control performance using fuzzy logic and model predictive control method

The main target of this paper is to control the speed of DC motor by comparing the actual and the desired speed set point. The DC motor is designed using Fuzzy logic and MPC controllers. The comparison is made between the proposed controllers for the control target speed of the DC motor using square and white noise desired input signals with the help of Matlab/Simulink software. It has been realized that the design based on the fuzzy logic controller track the set pointwith the best steady state and transient system behavior than the design with MPC controller. Finally, the comparative simulation result prove the effectiveness of the DC motor with fuzzy logic controller

Piranti Lunak Untuk Mendesain Program Dalam Bahasa Pemrograman C Berdasarkan Hoare Logic

The purpose of Hoare Logic is to provide a set of logical rules in order to reason about the correctness of computer programs with the rigor of mathematical logic. Because of that, Hoare Logic becomes the axiomatic basis for computer programming with several rules to prove the correctness of program. Hence, we can apply the proven rules of Hoare Logic as the basis to design a program correctly according to Hoare Logic. In this paper, Hoare Logic is applied in a software which is designed to help the user to design a program in C programming language correctly based on rules in Hoare Logic. When using this software, the user needs to know what program he will create and analyze an algorithm for it. After that, the user can use the software containing the rules of Hoare Logic and write the pseudo-code of C to design his program. At the end of this application, the user will obtain a source code of the program written in C programming language. This software is guaranteed to produce 100% correct output only if the users have the basic understanding of Hoare Logic as well as C program language before using this software

Proposing a secure component-based-application logic and system’s integration testing approach

Software engineering moved from traditional methods of software enterprise applications to com-ponent based development for distributed system’s applications. This new era has grown up forlast few years, with component-based methods, for design and rapid development of systems, butfact is that , deployment of all secure software features of technology into practical e-commercedistributed systems are higher rated target for intruders. Although most of research has been con-ducted on web application services that use a large share of the present software, but on the otherside Component Based Software in the middle tier ,which rapidly develops application logic, alsoopen security breaching opportunities .This research paper focus on a burning issue for researchersand scientists ,a weakest link in component based distributed system, logical attacks, that cannotbe detected with any intrusion detection system within the middle tier e-commerce distributed ap-plications. We proposed An Approach of Secure Designing application logic for distributed system,while dealing with logically vulnerability issue

PGPG: An Automatic Generator of Pipeline Design for Programmable GRAPE Systems

We have developed PGPG (Pipeline Generator for Programmable GRAPE), a software which generates the low-level design of the pipeline processor and communication software for FPGA-based computing engines (FBCEs). An FBCE typically consists of one or multiple FPGA (Field-Programmable Gate Array) chips and local memory. Here, the term "Field-Programmable" means that one can rewrite the logic implemented to the chip after the hardware is completed, and therefore a single FBCE can be used for calculation of various functions, for example pipeline processors for gravity, SPH interaction, or image processing. The main problem with FBCEs is that the user need to develop the detailed hardware design for the processor to be implemented to FPGA chips. In addition, she or he has to write the control logic for the processor, communication and data conversion library on the host processor, and application program which uses the developed processor. These require detailed knowledge of hardware design, a hardware description language such as VHDL, the operating system and the application, and amount of human work is huge. A relatively simple design would require 1 person-year or more. The PGPG software generates all necessary design descriptions, except for the application software itself, from a high-level design description of the pipeline processor in the PGPG language. The PGPG language is a simple language, specialized to the description of pipeline processors. Thus, the design of pipeline processor in PGPG language is much easier than the traditional design. For real applications such as the pipeline for gravitational interaction, the pipeline processor generated by PGPG achieved the performance similar to that of hand-written code. In this paper we present a detailed description of PGPG version 1.0.Comment: 24 pages, 6 figures, accepted PASJ 2005 July 2

A synthesis of logic and biology in the design of dependable systems

The technologies of model-based design and dependability analysis in the design of dependable systems, including software intensive systems, have advanced in recent years. Much of this development can be attributed to the application of advances in formal logic and its application to fault forecasting and verification of systems. In parallel, work on bio-inspired technologies has shown potential for the evolutionary design of engineering systems via automated exploration of potentially large design spaces. We have not yet seen the emergence of a design paradigm that combines effectively and throughout the design lifecycle these two techniques which are schematically founded on the two pillars of formal logic and biology. Such a design paradigm would apply these techniques synergistically and systematically from the early stages of design to enable optimal refinement of new designs which can be driven effectively by dependability requirements. The paper sketches such a model-centric paradigm for the design of dependable systems that brings these technologies together to realise their combined potential benefits

Performance comparison between PID and fuzzy logic controller in position control system of dc servomotor

The objective of this paper is to compare the time specification performance between conventional controller and artificial intelligence controller in position control system of a DC motor. This will include design and development of a GUI software using Microsoft Visual Basic 6.0 for position control system experiment. The scope of this research is to apply direct digital control technique in position control system. Two types of controller namely PID and fuzzy logic controller will be used to control the output response. An interactive software will be developed to visualize and analyze the system. This project consists of hardware equipment and software design. The hardware parts involve in interfacing MS150 Modular servo System and Data Acquisition System with a personal computer. The software part includes programming real-time software using Microsoft Visual Basic 6.0. Finally, the software will be integrated with hardware to produce a GUI position control system

Otomatisasi Pembuatan Logic Design Dan Layout Pada Desain Vlsi ( Very Large Scale Integration )

In making of design VLSI ( Very Large Scale Integrated Scale Integration ) is needed planning of Logic Design and Layout. The function of making of Logic Design is to translate existing case study into truth tables and then it is described into logical gates. In order to make Logic Design easier, it is required a software, the name is DSCH2. It can simulate result of truth tables, beside that it has ability to make verilog file ( one of  high language program HDL ).Layout represents form of pattern to be used in making IC ( Integrated Circuit ), where form of pattern to be made have to proper by Logic Design which have been made. In making of layout used a software, the name is MICROWIND2. This software is able to read verilog file that produced by DSCH2. In this research, we build logic design and layout for basic logical gates, such as NOT, AND and SOP ( Sum of Product ). They were made from MOS and CMOS materials

Refinement Modal Logic

In this paper we present {\em refinement modal logic}. A refinement is like a bisimulation, except that from the three relational requirements only `atoms' and `back' need to be satisfied. Our logic contains a new operator 'all' in addition to the standard modalities 'box' for each agent. The operator 'all' acts as a quantifier over the set of all refinements of a given model. As a variation on a bisimulation quantifier, this refinement operator or refinement quantifier 'all' can be seen as quantifying over a variable not occurring in the formula bound by it. The logic combines the simplicity of multi-agent modal logic with some powers of monadic second-order quantification. We present a sound and complete axiomatization of multi-agent refinement modal logic. We also present an extension of the logic to the modal mu-calculus, and an axiomatization for the single-agent version of this logic. Examples and applications are also discussed: to software verification and design (the set of agents can also be seen as a set of actions), and to dynamic epistemic logic. We further give detailed results on the complexity of satisfiability, and on succinctness