5,406 research outputs found

    Radiation and temperature effects on electronic components investigated under the CSTI high capacity power project

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    The effects of nuclear radiation and high temperature environments must be fully known and understood for the electronic components and materials used in both the Power Conditioning and Control subsystem and the reactor Instrumentation and Control subsystem of future high capacity nuclear space power systems. This knowledge is required by the designer of these subsystems in order to develop highly reliable, long-life power systems for future NASA missions. A review and summary of the experimental results obtained for the electronic components and materials investigated under the power management element of the Civilian Space Technology Initiative (CSTI) high capacity power project are presented: (1) neutron, gamma ray, and temperature effects on power semiconductor switches, (2) temperature and frequency effects on soft magnetic materials; and (3) temperature effects on rare earth permanent magnets

    Evolution engine technology in exhaust gas recirculation for heavy-duty diesel engine

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    In this present year, engineers have been researching and inventing to get the optimum of less emission in every vehicle for a better environmental friendly. Diesel engines are known reusing of the exhaust gas in order to reduce the exhaust emissions such as NOx that contribute high factors in the pollution. In this paper, we have conducted a study that EGR instalment in the vehicle can be good as it helps to prevent highly amount of toxic gas formation, which NOx level can be lowered. But applying the EGR it can lead to more cooling and more space which will affect in terms of the costing. Throughout the research, fuelling in the engine affects the EGR producing less emission. Other than that, it contributes to the less of performance efficiency when vehicle load is less

    Index to nasa tech briefs, issue number 2

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    Annotated bibliography on technological innovations in NASA space program

    High Radiation Resistant DC-DC Converter Regulators for use in Magnetic fields for LHC High Luminosity Silicon Trackers

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    For more efficient power transport to the electronics embedded inside large colliding beam detectors, we explore the feasibility of supplying higher DC voltage and using local DC-DC conversion to 1.3 V (or lower, depending upon on the lithography of the embedded electronics) using switch mode regulators located very close to the front end electronics. These devices will be exposed to high radiation and high magnetic fields, 10 – 100 Mrads and 2 - 4 Tesla at the SLHC

    Power Quality Enhancement in Hybrid Photovoltaic-Battery System based on three–Level Inverter associated with DC bus Voltage Control

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    This modest paper presents a study on the energy quality produced by a hybrid system consisting of a Photovoltaic (PV) power source connected to a battery. A three-level inverter was used in the system studied for the purpose of improving the quality of energy injected into the grid and decreasing the Total Harmonic Distortion (THD). A Maximum Power Point Tracking (MPPT) algorithm based on a Fuzzy Logic Controller (FLC) is used for the purpose of ensuring optimal production of photovoltaic energy. In addition, another FLC controller is used to ensure DC bus stabilization. The considered system was implemented in the Matlab /SimPowerSystems environment. The results show the effectiveness of the proposed inverter at three levels in improving the quality of energy injected from the system into the grid.Peer reviewedFinal Published versio

    SINGLE-EVENT EFFECT STUDY ON A DC/DC PWM USING MULTIPLE TESTING METHODOLOGIES

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    As the technology advances, the feature size of the modern integrated circuits (ICs) has decreased dramatically to nanometer amplitude. On one hand, the shrink brings benefits, such as high speed and low power consumption per transistor. On the other hand, it poses a threat to the reliable operation of the ICs by the increased radiation sensitivity, such as single event effects (SEEs). For example, in 2010, a commercial-off-the-shelf (COTS) BiCMOS DC/DC pulse width modulator (PWM) IC was observed to be sensitive to neutrons on terrestrial real-time applications, where negative 6-μs glitches were induced by the single event transient (SET) effects. As a result, a project was set up to comprehensively study the failure mechanisms with various test methodologies and to develop SET-tolerant circuits to mitigate the SET sensitivity. First, the pulsed laser technique is adopted to perform the investigation on the SET response of the DC/DC PWM chip. A Ti:Sapphire single photon absorption (SPA) laser with different wavelengths and repetition rates is used as an irradiation source in this study. The sensitive devices in the chip are found to be the bandgap voltage reference circuit thanks to the well-controlled location information of the pulsed laser. The result is verified by comparing with the previous alpha particle and neutron testing data as well as circuit simulation using EDA tools. The root cause for the sensitivity is also acquired by analyzing the circuit. The temperature is also varied to study the effect of the temperature-induced quiescent point shift on the SET sensitivity of the chip. The experimental results show that the quiescent point shifts have different impacts on SET sensitivities due to the different structures and positions of the circuitries. After that, heavy ions, protons, and the pulsed X-ray are used as irradiation sources to further study the SET response of the DC/DC chip. The heavy ion and pulsed laser data are correlated to each other. And the equivalent LETs for laser with wavelengths of 750 nm, 800 nm, 850 nm and 920 nm are acquired. This conclusion can be used to obtain the equivalent heavy ion cross section of any area in a chip by using the pulsed laser technique, which will facilitate the SET testing procedure dramatically. The proton and heavy ion data are also correlated to each other based on a rectangular parallel piped (RPP) model, which gives convenience in Soft Error Rate (SER) estimation. The potential application of pulsed X-ray technique in SET field is also investigated. It is capable of generating similar results with those of heavy ion and pulsed laser testing. Both the advantages and disadvantages of this technique are explained. This provides an alternative choice for the SET testing in the future. Finally, the bandgap voltage reference circuit in the DC/DC PWM is redesigned and fabricated in bulk CMOS 130nm technology and a SET hardened bandgap circuit is proposed and investigated. The CMOS substrate PNP transistor is much less sensitive to SETs than the BiCMOS NPN transistor according to the pulsed laser test results. The reason is analyzed to be the different fabrication processes of the two technologies. The laser test results also indicate that the SET hardened bandgap circuit can mitigate the SET amplitude dramatically, which is consistent with the SPICE simulation results. These researches provide more understandings on the design of SET hardened bandgap voltage reference circuit

    A High-efficiency, Small, Solid-state Laser for Pyrotechnic Ignition

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    A completely self-contained, small, neodymium laser has been designed and demonstrated for use in a pyrotechnic ignition system. A nominal 16 J of laser energy (1.06 micron wavelength, 1-ms duration) was achieved in a rectangular 10.5-X 15.1-X 25.4-cm package weighting 5.14 kg. This high energy-to-weight ratio is encouraging for laser applications in which specific energy efficiency (energy per unit weight or volume) is important. The laser design concepts are described, and some results on pyrotechnic ignition are given. Some details on a laser currently under construction, which will be 1/8 the size of the above laser, are included

    The NASA CSTI high capacity power project

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    The SP-100 Space Nuclear Power Program was established in 1983 by DOD, DOE, and NASA as a joint program to develop technology for military and civil applications. Starting in 1986, NASA has funded a technology program to maintain the momentum of promising aerospace technology advancement started during Phase 1 of SP-100 and to strengthen, in key areas, the chances for successful development and growth capability of space nuclear reactor power systems for a wide range of future space applications. The elements of the Civilian Space Technology Initiative (CSTI) High Capacity Power Project include Systems Analysis, Stirling Power Conversion, Thermoelectric Power Conversion, Thermal Management, Power Management, Systems Diagnostics, Environmental Interactions, and Material/Structural Development. Technology advancement in all elements is required to provide the growth capability, high reliability and 7 to 10 year lifetime demanded for future space nuclear power systems. The overall project will develop and demonstrate the technology base required to provide a wide range of modular power systems compatible with the SP-100 reactor which facilitates operation during lunar and planetary day/night cycles as well as allowing spacecraft operation at any attitude or distance from the sun. Significant accomplishments in all of the project elements will be presented, along with revised goals and project timelines recently developed

    Development of the readout electronics for the high luminosity upgrade of the CMS outer strip tracker

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    The High-luminosity upgrade of the LHC will deliver the dramatic increase in luminosity required for precision measurements and to probe Beyond the Standard Model theories. At the same time, it will present unprecedented challenges in terms of pileup and radiation degradation. The CMS experiment is set for an extensive upgrade campaign, which includes the replacement of the current Tracker with another all-silicon detector with improved performance and reduced mass. One of the most ambitious aspects of the future Tracker will be the ability to identify high transverse momentum track candidates at every bunch crossing and with very low latency, in order to include tracking information at the L1 hardware trigger stage, a critical and effective step to achieve triggers with high purity and low threshold. This thesis presents the development and the testing of the CMS Binary Chip 2 (CBC2), a prototype Application Specific Integrated Circuit (ASIC) for the binary front-end readout of silicon strip detectors modules in the Outer Tracker, which also integrates the logic necessary to identify high transverse momentum candidates by correlating hits from two silicon strip detectors, separated by a few millimetres. The design exploits the relation between the transverse momentum and the curvature in the trajectory of charged particles subject to the large magnetic field of CMS. The logic which follows the analogue amplification and binary conversion rejects clusters wider than a programmable maximum number of adjacent strips, compensates for the geometrical offset in the alignment of the module, and correlates the hits between the two sensor layers. Data are stored in a memory buffer before being transferred to an additional buffer stage and being serially read-out upon receipt of a Level 1 trigger. The CBC2 has been subject to extensive testing since its production in January 2013: this work reports the results of electrical characterization, of the total ionizing dose irradiation tests, and the performance of a prototype module instrumented with CBC2 in realistic conditions in a beam test. The latter is the first experimental demonstration of the Pt-selection principle central to the future of CMS. Several total-ionizing-dose tests highlighted no functional issue, but observed significant excess static current for doses <1 Mrad. The source of the excess was traced to static leakage current in the memory pipeline, and is believed to be a consequence of the high instantaneous dose delivered by the x-ray setup. Nevertheless, a new SRAM layout aimed at removing the leakage path was proposed for the CBC3. The results of single event upset testing of the chip are also reported, two of the three distinct memory circuits used in the chip were proven to meet the expected robustness, while the third will be replaced in the next iteration of the chip. Finally, the next version of the ASIC is presented, highlighting the additional features of the final prototype, such as half-strip resolution, additional trigger logic functionality, longer trigger latency and higher rate, and fully synchronous stub readout.Open Acces
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