36 research outputs found

    Component-Level Mitigation Solution and System-Level Analysis Method of High-Voltage Transient ESD Event

    Get PDF
    Department of Electrical EngineeringElectrostatic discharge (ESD) is a significant phenomenon in the field of electromagnetic compatibility (EMC) that causes critical issues in the reliability and functionality of electronic devices and systems. ESD events can be classified based on the occurring environment and conditions, and the methods to address related issues vary accordingly. The two main classifications are component-level ESD events and system-level ESD events. Component-level ESD events primarily occur during repetitive and predictable stages of electronic component and product manufacturing processes. These events can be effectively addressed by eliminating the ESD hazards themselves. On the other hand, system-level ESD events are characterized by their irregular and unpredictable occurrence during the operation of electronic devices and systems. To address issues related to system-level ESD events, it is necessary to enhance ESD robustness of the system. This thesis covers research on various aspects of the ESD that encompass both component-level events and system-level events. In electronic device manufacturing process, ionizers are commonly used to effectively eliminate static charges. Among diverse ionizers, corona ionizers utilizing a high-voltage source are widely preferred for their easy installation and safety. However, the corona ionizers may induce electric overstress (EOS) to sensitive electronic devices. Also, regular maintenance is necessary to prevent particle accumulation on corona ionizers, which can interfere with their performance and lead to ESD failures. In this thesis, a novel low-voltage microwave plasma ionizer is proposed and analyzed to address the critical limitations associated with the EOS risk and particle fuzzballs in the corona ionizers. To evaluate the system-level ESD immunity of electronic products, researchers and manufacturers conduct ESD immunity tests according to international standards such as IEC 61000-4-2 and ISO 10605 for general and automotive electronic devices, respectively. However, the process of design iteration and troubleshooting to improve the ESD immunity of novel electronic devices in this test setup are time consuming and costly. To solve this problem, many studies have been conducted to predict ESD immunity by computing the system-level ESD noise in the test setup. However, the prediction of the automotive system-level ESD immunity is very difficult because the automotive ESD test setup in ISO 10605 contains complex and large structures, requiring significant computational memory and time. In this thesis, an accurate and efficient method for computing system-level ESD noise waveforms in the ISO 10605 standard using the decomposition method and split-domain approach is proposed and validated. While the standards related to the ESD immunity test primarily address ESD scenarios involving a charged human body, it is also important to consider other objects that may act as ESD sources, which can be charged with high potential. For example, in areas with low relative humidity, such as deserts, automotive parts can be damaged or malfunction if they come into contact with a charged dust cleaner during cleaning operations. In this thesis, an ESD model of a dust cleaner is proposed and the ESD failure of an automobile headlamp is analyzed using the proposed ESD model.clos

    La modélisation de l’immunité des circuits intégrés au-delà de 1 GHz

    Get PDF
    Electromagnetic Compatibility (EMC) is the faculty of working devices to co-exist electromagnetically. In practice, it turns out to be very complex to create electromagnetically compatible devices. The weapon to succeed the complex challenge of creating First-Time-Right (FTR) compatible devices is modelling. This thesis investigates whether it makes sense to model the conducted immunity of Integrated Circuits (ICs) beyond 1 GHz and how to do that. If the Printed Circuit Board (PCB) traces determine a PCB's radiated immunity, it is interesting to predict their coupling efficiency and to understand how that depends on the trace routing. Because full-wave solvers are slow and do not yield understanding, the existing Taylor cell model is modified to yield another 100 times speedup and an insightful upper bound, for vertically polarised, grazing-incident plane wave illumination of electrically long, multi-segment traces with arbitrary terminal loads. The results up to 20 GHz match with full-wave simulations to within 2.6 dB average absolute error and with Gigahertz Transverse Electromagnetic-cell (GTEM-cell) measurements to within 4.0 dB average absolute error. If the conducted immunity of ICs is interesting above 1 GHz, a measurement method is needed that is valid beyond 1 GHz. There is no standardised method yet, because with rising frequency, the common measurement set-up increasingly obscures the IC's immunity. An attempt to model and remove the set-up's impact on the measurement result proved difficult. Therefore, a simplified set-up and extraction method is proposed and a proof-of-concept of the automatic generation of the set-up's PCB is given. The conducted immunity of an LM7805 voltage regulator is measured up to 4.2 GHz to demonstrate the method. Except for a general trend of rising frequencies, there is only little concrete proof for the relevance of IC immunity modelling beyond 1 GHz. A full-wave simulation suggests that up to 10 GHz, most energy enters the die via the trace. Similarly, the radiated immunity of a microstrip trace and an LM7805 voltage regulator is predicted by concatenating the models developed above. Although this model neglects the radiated immunity of the IC itself, the prediction corresponds with GTEM-cell measurement to within 2.1 dB average absolute error. These experiments suggest the most radiation enters a PCB via its traces, well beyond 1 GHz, hence it is useful to model the conducted immunity of IC beyond 1 GHz. Therefore, the extension of IEC 62132-4 to 10 GHz should be seriously considered. Moreover, the speed and transparency of the modified Taylor model for field-to-trace coupling open up new possibilities for computer-aided design. The semi-automatic generation of lean extraction PCB could facilitate model extraction. There are also critical remaining questions, remaining to be answered.La compatibilité électromagnétique (CEM) est l'aptitude des produits électroniques à coexister au niveau électromagnétique. Dans la pratique, c'est une tâche très complexe que de concevoir des produits compatibles. L'arme permettant de concevoir des produits bon-du-premier-coup est la modélisation. Cette thèse étudie l'utilité et la faisabilité de la modélisation de l'immunité des circuits intégrés (CI) au-delà de 1 GHz. Si les pistes des circuits imprimés déterminent l'immunité rayonnée de ces circuits, il serait pertinent de pouvoir prévoir l'efficacité de couplage et de comprendre comment elle découle du routage des pistes. Les solveurs full-wave sont lents et ne contribuent pas à la compréhension. En conséquence, un modèle existant (la cellule de Taylor) est modifié de manière à ce que son temps de calcul soit divisé par 100. De plus, ce modèle modifié est capable de fournir une explication de la limite supérieure pour le couplage d'une onde plane, rasante et polarisée verticalement vers une piste de plusieurs segments, électriquement longue et avec des terminaisons arbitraires. Les résultats jusqu'à 20 GHz corrèlent avec des simulations fullwave à une erreur absolue moyenne de 2,6 dB près et avec des mesures en cellule GTEM (Gigahertz Transversale Electromagnétique) à une erreur absolue moyenne de 4,0 dB près. Si l'immunité conduite des CI est intéressante au-delà de 1 GHz, il faut une méthode de mesure, valable au-delà de 1 GHz. Actuellement, il n'y a pas de méthode normalisée, car la fréquence élevée fausse les observations faites avec la manipulation normalisée. Il est difficile de modéliser et de compenser le comportement de la manipulation normalisée. Par conséquent, une manipulation simplifiée et sa méthode d'extraction correspondante sont proposées, ainsi qu'une démonstration du principe de génération automatique de la carte d'essai utilisée dans la manipulation simplifiée. Pour illustrer la méthode simplifiée, l'immunité conduite d'un régulateur de tension LM7805 est mesurée jusqu'à 4,2 GHz. À part la tendance générale des fréquences qui montent, il y a peu de preuve concrète qui étaye la pertinence de la modélisation de l'immunité conduite des CI au-delà de 1 GHz. Une simulation full-wave suggère que jusqu'à 10 GHz, la plus grande partie de l'énergie rentre dans la puce à travers la piste. Par concaténation des modèles développés ci-dessus, l'immunité rayonnée d'une piste micro-ruban et d'un régulateur de tension LM7805 est prédite. Bien que ce modèle néglige l'immunité rayonnée du CI lui-même, la prédiction corrèle avec des mesures en cellule GTEM à une erreur absolue de 2,1 dB en moyenne. Ces expériences suggèrent que la plus grande partie du rayonnement entre dans un circuit imprimé à travers ses pistes, bien au-delà de 1 GHz. Dans ce cas, la modélisation de l'immunité conduite au-delà de 1 GHz serait utile. Par conséquent, l'extension jusqu'à 10 GHz de la méthode de mesure CEI 62132-4 devrait être considérée. De plus, la vitesse et la transparence du modèle de Taylor modifié pour le couplage champ-à-ligne permettent des innovations dans la conception assistée par l'ordinateur. La génération semiautomatique des cartes d'essais dites maigres pourrait faciliter l'extraction des modèles. Certaines questions critiques et importantes demeurent ouvertes

    An investigation of the microwave upset of avionic circuitry

    Get PDF
    Circuit technology of the 1970-90 era appears fairly resilient to microwave radio frequency interference, with few reported occurrences of interference. However, a proposition has been developed which substantiates fears that new technologies, with their extremely high packing densities, small device p-n junctions and very high clock rates, will be very susceptible to interference throughout the microwave band It has been postulated that the mechanism for this upset is demodulation and that it will come about by either the predicted changes in the microwave RF environment by the year 2000, or by a suitable choice of phasing and frequency at high power. The postulation is studied by developing an overall ingress equation, relating incident power density at the aircraft to the load voltage at an avionic circuit component. The equation's terms are investigated to quantif' their contribution to the likelihood of interference. The operational RF environment for aircraft is studied and predictions of the current and maximum future environments are made. A practical investigation of 2-18 GH.z airframe shielding is described, with comparison of the results with those from a number of other aircraft and helicopter types. A study of ingress into avionic boxes is presented and is followed by the results of an investigation of energy coupling via the cables and connectors, including the development and practical examination of a coupling model based on transmission line theory. A study is then presented of circuit technology developments, electronic component interference and damage mechanisms, and evidence of upset of electronic equipment is given. Investigations show that there is more 1-18 GHz upset of electronic equipment than originally thought and data suggest that thermal damage of active devices may dominate over-voltage stressing of p-n junctions. Aircraft investigations have shown that incident microwave radiation is attenuated approximately 20 dB by the airframe, in a complex fashion which does not lend itself to being modelled easily. Under some conditions this value of airframe attenuation is seen to approach zero, removing any shielding of avionics by the airframe for these cases. A predictor for airframe shielding independent of air vehicle type has been developed, based on cumulative density ftrnctions of all data from each of the aircraft types examined. The cable coupling model gives good agreement with measured data except for the dependency of load voltage on cable length and illuminating antenna position along the cable, for which an empirical equation has been developed. Computer power limitations and significant variations of most of the parameters in the overall ingress equation suggest that modelling of the complex innards of aircraft and avionics at these frequencies will remain impractical for the foreseeable future and that probabilistic models are the only achievable goal. It is concluded that all avionic circuit technologies may well be upset as postulated above or by speculative High Power Microwave weapons, but that careful use of existing aircraft and equipment design methodologies can offer adequate protection. An improved protection regime is proposed for future aircraft and a number of fUture research areas are identified to enable better understanding of the microwave hazard to aircraft. The three areas which will add most to this understanding are modelling of the precise microwave environment to be encountered, further airframe shielding measurements and analyses, from all incidence angles and on different aircraft types, and the construction and cumulative probability fUnction analyses of electronic component and equipment upset databases

    The Deep Space Network

    Get PDF
    Progress in flight project support, tracking and data acquisition (TDA) research and technology, network engineering, hardware and software implementation, and operations are reported

    Second IEEE/LEOS Benelux Chapter, November 26th, 1997, Eindhoven University of Technology, The Netherlands

    Get PDF

    Second IEEE/LEOS Benelux Chapter, November 26th, 1997, Eindhoven University of Technology, The Netherlands

    Get PDF

    Circuit design and technological limitations of silicon RFICs for wireless applications

    Get PDF
    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.Includes bibliographical references (p. 201-206).Semiconductor technologies have been a key to the growth in wireless communication over the past decade, bringing added convenience and accessibility through advantages in cost, size, and power dissipation. A better understanding of how an IC technology affects critical RF signal chain components will greatly aid the design of wireless systems and the development of process technologies for the increasingly complex applications that lie on the horizon. Many of the evolving applications will embody the concept of adaptive performance to extract the maximum capability from the RF link in terms of bandwidth, dynamic range, and power consumption-further engaging the interplay of circuits and devices is this design space and making it even more difficult to discern a clear guide upon which to base technology decisions. Rooted in these observations, this research focuses on two key themes: 1) devising methods of implementing RF circuits which allow the performance to be dynamically tuned to match real-time conditions in a power-efficient manner, and 2) refining approaches for thinking about the optimization of RF circuits at the device level. Working toward a 5.8 GHz receiver consistent with 1 GBit/s operation, signal path topologies and adjustable biasing circuits are developed for low-noise amplifiers (LNAs) and voltage-controlled oscillators (VCOs) to provide a facility by which power can be conserved when the demand for sensitivity is low. As an integral component in this effort, tools for exploring device level issues are illustrated with both circuit types, helping to identify physical limitations and design techniques through which they can be mitigated.(cont.) The design of two LNAs and four VCOs is described, each realized to provide a fully-integrated solution in a 0.5 tm SiGe BiCMOS process, and each incorporating all biasing and impedance matching on chip. Measured results for these 5-6GHz circuits allow a number of poignant technology issues to be enlightened, including an exhibition of the importance of terminal resistances and capacitances, a demonstration of where the transistor fT is relevant and where it is not, and the most direct comparison of bipolar and CMOS solutions offered to date in this frequency range. In addition to covering a number of new circuit techniques, this work concludes with some new views regarding IC technologies for RF applications.by Donald A. Hitko.Ph.D

    Design and implementation of gallium arsenide digital integrated circuits

    Get PDF

    MME2010 21st Micromechanics and Micro systems Europe Workshop : Abstracts

    Get PDF
    corecore