20,668 research outputs found

    Planar compact array with parasitic elements for MIMO systems

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    A compact planar array with parasitic elements is studied to be used in MIMO systems. Classical compact arrays suffer from high coupling which makes correlation and matching efficiency to be worse. A proper matching network improves these lacks although its bandwidth is low and may increase the antenna size. The proposed antenna makes use of parasitic elements to improve both correlation and efficiency. A specific software based on MoM has been developed to analyze radiating structures with several feed points. The array is optimized through a Genetic Algorithm to determine parasitic elements position in order to fulfill different figures of merit. The proposed design provides the required correlation and matching efficiency to have a good performance over a significant bandwidth

    Distributed Deterministic Broadcasting in Uniform-Power Ad Hoc Wireless Networks

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    Development of many futuristic technologies, such as MANET, VANET, iThings, nano-devices, depend on efficient distributed communication protocols in multi-hop ad hoc networks. A vast majority of research in this area focus on design heuristic protocols, and analyze their performance by simulations on networks generated randomly or obtained in practical measurements of some (usually small-size) wireless networks. %some library. Moreover, they often assume access to truly random sources, which is often not reasonable in case of wireless devices. In this work we use a formal framework to study the problem of broadcasting and its time complexity in any two dimensional Euclidean wireless network with uniform transmission powers. For the analysis, we consider two popular models of ad hoc networks based on the Signal-to-Interference-and-Noise Ratio (SINR): one with opportunistic links, and the other with randomly disturbed SINR. In the former model, we show that one of our algorithms accomplishes broadcasting in O(Dlog2n)O(D\log^2 n) rounds, where nn is the number of nodes and DD is the diameter of the network. If nodes know a priori the granularity gg of the network, i.e., the inverse of the maximum transmission range over the minimum distance between any two stations, a modification of this algorithm accomplishes broadcasting in O(Dlogg)O(D\log g) rounds. Finally, we modify both algorithms to make them efficient in the latter model with randomly disturbed SINR, with only logarithmic growth of performance. Ours are the first provably efficient and well-scalable, under the two models, distributed deterministic solutions for the broadcast task.Comment: arXiv admin note: substantial text overlap with arXiv:1207.673

    Downlink Coverage and Rate Analysis of Low Earth Orbit Satellite Constellations Using Stochastic Geometry

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    As low Earth orbit (LEO) satellite communication systems are gaining increasing popularity, new theoretical methodologies are required to investigate such networks' performance at large. This is because deterministic and location-based models that have previously been applied to analyze satellite systems are typically restricted to support simulations only. In this paper, we derive analytical expressions for the downlink coverage probability and average data rate of generic LEO networks, regardless of the actual satellites' locality and their service area geometry. Our solution stems from stochastic geometry, which abstracts the generic networks into uniform binomial point processes. Applying the proposed model, we then study the performance of the networks as a function of key constellation design parameters. Finally, to fit the theoretical modeling more precisely to real deterministic constellations, we introduce the effective number of satellites as a parameter to compensate for the practical uneven distribution of satellites on different latitudes. In addition to deriving exact network performance metrics, the study reveals several guidelines for selecting the design parameters for future massive LEO constellations, e.g., the number of frequency channels and altitude.Comment: Accepted for publication in the IEEE Transactions on Communications in April 202

    A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

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    A 77-GHz, +17.5 dBm power amplifier (PA) with fully integrated 50-Ω input and output matching and fabricated in a 0.12-µm SiGe BiCMOS process is presented. The PA achieves a peak power gain of 17 dB and a maximum single-ended output power of 17.5 dBm with 12.8% of power-added efficiency (PAE). It has a 3-dB bandwidth of 15 GHz and draws 165 mA from a 1.8-V supply. Conductor-backed coplanar waveguide (CBCPW) is used as the transmission line structure resulting in large isolation between adjacent lines, enabling integration of the PA in an area of 0.6 mm^2. By using a separate image-rejection filter incorporated before the PA, the rejection at IF frequency of 25 GHz is improved by 35 dB, helping to keep the PA design wideband

    A fully bidirectional 2.4-GHz Wireless-Over-Fiber system using Photonic Active Integrated Antennas (PhAIAs)

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    A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas

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    In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi
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