Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-leg Configuration

Compared to SiC MOSFET, the switching loss of Si IGBT is much higher due to its slow switching speed and tail current. Si IGBT/SiC MOSFET hybrid switch device can reach to optimal performance with low static and dynamic loss, which can improve the current capacity of SiC devices and reduce the power loss of Si IGBT based converters. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions. This measurement tends to reduce the switching loss of Si IGBT. However, the switching time delay between these two devices has significant impacts on its power loss. In this paper, the switching time delay optimization method is proposed to minimize the power loss of the hybrid switch. The static and dynamic characteristics of Si IGBT/SiC MOSFET hybrid-paralleled switch are studied, and a generalized power loss model for hybrid switch is developed. The influence of switching time delay on the characteristics of hybrid switch is analyzed and verified through double pulse tests in a phase-leg configuration. The experimental results show that the optimal turn-on delay time is that the two devices turn on at the same time and the turn-on loss can be reduced by about 73% compared with the solely Si IGBT and by about 52% compared with the solely SiC MOSFET. While the optimal turn-off sequence is that the Si IGBT turns off ahead of the SiC MOSFET. Under the proposed optimal turn-off delay time of the hybrid switch, the turn-off loss is reduced by about 61.4%. This optimization strategy is used in a Buck converter to verify the superiority of the SiC/Si hybrid switch and the optimal switching sequence. Simulation results show that the optimal switching sequence is consistent with theoretical analysis, and the efficiency is improved by 2.5% compared with Buck converter using solely Si IGBT

A Fault-Tolerant T-Type Multilevel Inverter Topology With Increased Overload Capability and Soft-Switching Characteristics

he performance of a novel three-phase four-leg fault-tolerant T-type inverter topology is introduced in this paper. This inverter topology provides a fault-tolerant solution to any open-circuit and certain short-circuit switching faults in the power devices. During any of the fault-tolerant operation modes for these device faults, there is no derating required in the inverter output voltage or output power. In addition, overload capability is increased in this new T-type inverter compared to that in the conventional three-level T-type inverter. Such increase in inverter overload capability is due to the utilization of the redundant leg for overload current sharing with other main phase legs under healthy condition. Moreover, if the redundant phase leg is composed of silicon carbide metal-oxide-semiconductor field-effect transistors, quasi-zero-voltage switching, and zero-current switching of the silicon insulated-gate bipolar transistors (IGBTs) in the conventional main phase legs can be achieved at certain switching states, which can significantly relieve the thermal stress on the outer IGBTs and improve the whole inverter efficiency. Simulation and experimental results are given to verify the efficacy and merits of this high-performance fault-tolerant T-type inverter topology

Contributions to the design of power modules for electric and hybrid vehicles: trends, design aspects and simulation techniques

314 p.En la última década, la protección del medio ambiente y el uso alternativo de energías renovables están tomando mayor relevancia tanto en el ámbito social y político, como científico. El sector del transporte es uno de los principales causantes de los gases de efecto invernadero y la polución existente, contribuyendo con hasta el 27 % de las emisiones a nivel global. En este contexto desfavorable, la electrificación de los vehículos de carretera se convierte en un factor crucial. Para ello, la transición de la actual flota de vehículos de carretera debe ser progresiva forzando la investigación y desarrollo de nuevos conceptos a la hora de producir vehículos eléctricos (EV) y vehículos eléctricos híbridos (HEV) más eficientes, fiables, seguros y de menor coste. En consecuencia, para el desarrollo y mejora de los convertidores de potencia de los HEV/EV, este trabajo abarca los siguientes aspectos tecnológicos: - Arquitecturas de la etapa de conversión de potencia. Las principales topologías que pueden ser implementadas en el tren de potencia para HEV/EV son descritas y analizadas, teniendo en cuenta las alternativas que mejor se adaptan a los requisitos técnicos que demandan este tipo de aplicaciones. De dicha exposición se identifican los elementos constituyentes fundamentales de los convertidores de potencia que forman parte del tren de tracción para automoción.- Nuevos dispositivos semiconductores de potencia. Los nuevos objetivos y retos tecnológicos solo pueden lograrse mediante el uso de nuevos materiales. Los semiconductores Wide bandgap (WBG), especialmente los dispositivos electrónicos de potencia basados en nitruro de galio (GaN) y carburo de silicio (SiC), son las alternativas más prometedoras al silicio (Si) debido a las mejores prestaciones que poseen dichos materiales, lo que permite mejorar la conductividad térmica, aumentar las frecuencias de conmutación y reducir las pérdidas.- Análisis de técnicas de rutado, conexionado y ensamblado de módulos de potencia. Los módulos de potencia fabricados con dies en lugar de dispositivos discretos son la opción preferida por los fabricantes para lograr las especificaciones indicadas por la industria de la automoción. Teniendo en cuenta los estrictos requisitos de eficiencia, fiabilidad y coste es necesario revisar y plantear nuevos layouts de las etapas de conversión de potencia, así como esquemas y técnicas de paralelización de los circuitos, centrándose en las tecnologías disponibles.Teniendo en cuenta dichos aspectos, la presente investigación evalúa las alternativas de semiconductores de potencia que pueden ser implementadas en aplicaciones HEV/EV, así como su conexionado para la obtención de las densidades de potencia requeridas, centrándose en la técnica de paralelización de semiconductores. Debido a la falta de información tanto científica como comercial e industrial sobre dicha técnica, una de las principales contribuciones del presente trabajo ha sido la propuesta y verificación de una serie de criterios de diseño para el diseño de módulos de potencia. Finalmente, los resultados que se han extraído de los circuitos de potencia propuestos demuestran la utilidad de dichos criterios de diseño, obteniendo circuitos con bajas impedancias parásitas y equilibrados eléctrica y térmicamente. A nivel industrial, el conocimiento expuesto en la presente tesis permite reducir los tiempos de diseño a la hora de obtener prototipos de ciertas garantías, permitiendo comenzar la fase de prototipado habiéndose realizado comprobaciones eléctricas y térmicas

Degradation modeling and degradation-aware control of power electronic systems

The power electronics market is valued at $23.25 billion in 2019 and is projected to reach$ 36.64 billion by 2027. Power electronic systems (PES) have been extensively used in a wide range of critical applications, including automotive, renewable energy, industrial variable-frequency drive, etc. Thus, the PESs\u27 reliability and robustness are immensely important for the smooth operation of mission-critical applications. Power semiconductor switches are one of the most vulnerable components in the PES. The vulnerability of these switches impacts the reliability and robustness of the PES. Thus, switch-health monitoring and prognosis are critical for avoiding unexpected shutdowns and preventing catastrophic failures. The importance of the prognosis study increases dramatically with the growing popularity of the next-generation power semiconductor switches, wide bandgap switches. These switches show immense promise in the high-power high-frequency operations due to their higher breakdown voltage and lower switch loss. But their wide adaptation is limited by the inadequate reliability study. A thorough prognosis study comprising switch degradation modeling, remaining useful life (RUL) estimation, and degradation-aware controller development, is important to enhance the PESs\u27 robustness, especially with wide bandgap switches. In this dissertation, three studies are conducted to achieve these objectives- 1) Insulated Gate Bipolar Transistor (IGBT) degradation modeling and RUL estimation, 2) cascode Gallium Nitride (GaN) Field-Effect Transistor (FET) degradation modeling and RUL estimation, and 3) Degradation-aware controller design for a PES, solid-state transformer (SST). The first two studies have addressed the significant variation in RUL estimation and proposed degradation identification methods for IGBT and cascode GaN FET. In the third study, a system-level integration of the switch degradation model is implemented in the SST. The insight into the switch\u27s degradation pattern from the first two studies is integrated into developing a degradation-aware controller for the SST. State-of-the-art controllers do not consider the switch degradation that results in premature system failure. The proposed low-complexity degradation-aware and adaptive SST controller ensures optimal degradation-aware power transfer and robust operation over the lifetime

Advanced Silicon Carbide Based Fault-Tolerant Multilevel Converters

The number of safety-critical loads in electric power areas have been increasing drastically in the last two decades. These loads include the emerging more-electric aircraft (MEA), uninterruptible power supplies (UPS), high-power medical instruments, electric and hybrid electric vehicles (EV/HEV) and ships for military use, electric space rovers for space exploration and the like. This dissertation introduces two novel fault-tolerant three-level power converter topologies, named advanced three-level active neutral point clamped converter (A3L-ANPC) and advanced three-level active T-Type (A3L-ATT) converter. The goal of these converters is to increase the reliability of multilevel power converters used in safety-critical applications.These new fault-tolerant multilevel power converters are derived from the conventional ANPC and T-Type converter topologies. The topologies has significantly improved the fault-tolerant capability under any open circuit or certain short-circuit faults in the power semiconductor devices. In addition, under healthy conditions, the redundant phase leg can be utilized to share overload current with other main legs, which enhances the overload capability of the converter. The conduction losses in the power devices can be reduced by sharing the load current with the redundant leg. Moreover, unlike other existing fault-tolerant power converters in the literature, full output voltages can be always obtained during fault-tolerant operation. Experimental prototypes of both the A3L-ANPC and A3L-ATT converters were built based on Silicon Carbide (SiC) MOSFETs. Experimental results confirmed the anticipated performance of the novel three-level converter topologies.SiC MOSFET technology is at the forefront of significant advances in electric power conversion. SiC MOSFETs switch significantly faster than the conventional Silicon counterparts resulting in power converters with higher efficiency and increased switching frequencies. Low switching losses are one of the key characteristics of SiC technology. In this dissertation, hard and soft switching losses of a high power SiC MOSFET module are measured and characterized at different voltage and current operating points to determine the maximum operating frequency of the module. The purpose of characterizing the SiC MOSFET module is to determine the feasibility of very high frequency (200kHz-1MHz) power conversion which may not be possible to be implemented in the conventional Silicon based high power conversion. The results show that higher switching frequencies are achievable with soft switching techniques in high power converters

Health Condition Monitoring and Fault-Tolerant Operation of Adjustable Speed Drives

Adjustable speed drives (ASDs) have been extensively used in industrial applications over the past few decades because of their benefits of energy saving and control flexibilities. However, the wider penetration of ASD systems into industrial applications is hindered by the lack of health monitoring and fault-tolerant operation techniques, especially in safety-critical applications. In this dissertation, a comprehensive portfolio of health condition monitoring and fault-tolerant operation strategies is developed and implemented for multilevel neutral-point-clamped (NPC) power converters in ASDs. Simulations and experiments show that these techniques can improve power cycling lifetime of power transistors, on-line diagnosis of switch faults, and fault-tolerant capabilities.The first contribution of this dissertation is the development of a lifetime improvement Pulse Width Modulation (PWM) method which can significantly extend the power cycling lifetime of Insulated Gate Bipolar Transistors (IGBTs) in NPC inverters operating at low frequencies. This PWM method is achieved by injecting a zero-sequence signal with a frequency higher than that of the IGBT junction-to-case thermal time constants. This, in turn, lowers IGBT junction temperatures at low output frequencies. Thermal models, simulation and experimental verifications are carried out to confirm the effectiveness of this PWM method. As a second contribution of this dissertation, a novel on-line diagnostic method is developed for electronic switch faults in power converters. Targeted at three-level NPC converters, this diagnostic method can diagnose any IGBT faults by utilizing the information on the dc-bus neutral-point current and switching states. This diagnostic method only requires one additional current sensor for sensing the neutral-point current. Simulation and experimental results verified the efficacy of this diagnostic method.The third contribution consists of the development and implementation of a fault-tolerant topology for T-Type NPC power converters. In this fault-tolerant topology, one additional phase leg is added to the original T-Type NPC converter. In addition to providing a fault-tolerant solution to certain switch faults in the converter, this fault-tolerant topology can share the overload current with the original phase legs, thus increasing the overload capabilities of the power converters. A lab-scale 30-kVA ASD based on this proposed topology is implemented and the experimental results verified its benefits

Development of DC/AC power converters for applications requiring high efficiency.

Silicon-based power devices have dominated power electronics applications over the last decades. Research and development in microelectronics have pushed the performance of power devices to face some fundamental limitations of silicon material. Wide band-gap semiconductors, such as silicon carbide, offer a solution to the pressing energy efficiency performance requirements of power electronic systems. Silicon carbide power devices can operate at higher temperatures, higher frequencies, and generate less power losses as compared to traditional silicon-based technologies. The use of wide band-gap transistors, however, is not the only way to increase the efficiency of the converters. Special DC to AC topologies, named soft switching converters, can be adopted as well in order to reduce the switching losses of transistors. The development of DC to AC power converters for applications requiring high efficiency is presented in this thesis. Silicon and silicon carbide based inverters, as well as soft switching inverters, have been analyzed and fabricated for performance comparison

Next generation electric drives for HEV/EV propulsion systems: Technology, trends and challenges

In recent decades, several factors such as environmental protection, fossil fuel scarcity, climate change and pollution have driven the research and development of a more clean and sustainable transport. In this context, several agencies and associations, such as the European Union H2020, the United States Council for Automotive Research (USCAR) and the United Nations Economic and Social Commission for Asia (UN ESCAP) have defined a set of quantitative and qualitative goals in terms of efficiency, reliability, power losses, power density and economical costs to be met by next generation hybrid and full electric vehicle (HEV/EV) drive systems. As a consequence, the automotive electric drives (which consists of the electric machine, power converter and their cooling systems) of future vehicles have to overcome a number of technological challenges in order to comply with the aforementioned technical objectives. In this context, this paper presents, for each component of the electric drive, a comprehensive review of the state of the art, current technologies, future trends and enabling technologies that will make possible next generation HEV/EVs.This work has been partially supported by the Department of Education, Linguistic Policy and Culture of the Basque Government within the fund for research groups of the Basque university system IT978-16, by the Ministerio de Economía y Competitividad of Spain within the project DPI2014-53685-C2-2-R and FEDER funds and by the Government of the Basque Country within the research program ELKARTEK as the project KT4TRANS (KK-2015/00047 and KK-2016/00061), as well as by the program to support the specialization of Ph.D researchers at UPV/EHU ESPDOC16/25

Driving and Protection of High Density High Temperature Power Module for Electric Vehicle Application

There has been an increasing trend for the commercialization of electric vehicles (EVs) to reduce greenhouse gas emissions and dependence on petroleum. However, a key technical barrier to their wide application is the development of high power density electric drive systems due to limited space within EVs. High temperature environment inherent in EVs further introduces a new level of complexity. Under high power density and high temperature operation, system reliability and safety also become important. This dissertation deals with the development of advanced driving and protection technologies for high temperature high density power module capable of operating under the harsh environment of electric vehicles, while ensuring system reliability and safety under short circuit conditions. Several related research topics will be discussed in this dissertation. First, an active gate driver (AGD) for IGBT modules is proposed to improve their overall switching performance. The proposed one has the capability of reducing the switching loss, delay time, and Miller plateau duration during turn-on and turn-off transient without sacrificing current and voltage stress. Second, a board-level integrated silicon carbide (SiC) MOSFET power module is developed for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI) based gate driver board is designed and fabricated through chip-on-board (COB) technique. Also, a 1200 V / 100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. Third, a comprehensive short circuit ruggedness evaluation and numerical investigation of up-to-date commercial silicon carbide (SiC) MOSFETs is presented. The short circuit capability of three types of commercial 1200 V SiC MOSFETs is tested under various conditions. The experimental short circuit behaviors are compared and analyzed through numerical thermal dynamic simulation. Finally, according to the short circuit ruggedness evaluation results, three short circuit protection methods are proposed to improve the reliability and overall cost of the SiC MOSFET based converter. A comparison is made in terms of fault response time, temperature dependent characteristics, and applications to help designers select a proper protection method