Directed Placement for mVLSI Devices

Continuous-flow microfluidic devices based on integrated channel networks are becoming increasingly prevalent in research in the biological sciences. At present, these devices are physically laid out by hand by domain experts who understand both the underlying technology and the biological functions that will execute on fabricated devices. The lack of a design science that is specific to microfluidic technology creates a substantial barrier to entry. To address this concern, this article introduces Directed Placement, a physical design algorithm that leverages the natural "directedness" in most modern microfluidic designs: fluid enters at designated inputs, flows through a linear or tree-based network of channels and fluidic components, and exits the device at dedicated outputs. Directed placement creates physical layouts that share many principle similarities to those created by domain experts. Directed placement allows components to be placed closer to their neighbors compared to existing layout algorithms based on planar graph embedding or simulated annealing, leading to an average reduction in laid-out fluid channel length of 91% while improving area utilization by 8% on average. Directed placement is compatible with both passive and active microfluidic devices and is compatible with a variety of mainstream manufacturing technologies

Transport or Store? Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage

Flow-based microfluidic biochips have attracted much atten- tion in the EDA community due to their miniaturized size and execution efficiency. Previous research, however, still follows the traditional computing model with a dedicated storage unit, which actually becomes a bottleneck of the performance of bio- chips. In this paper, we propose the first architectural synthe- sis framework considering distributed storage constructed tem- porarily from transportation channels to cache fluid samples. Since distributed storage can be accessed more efficiently than a dedicated storage unit and channels can switch between the roles of transportation and storage easily, biochips with this dis- tributed computing architecture can achieve a higher execution efficiency even with fewer resources. Experimental results con- firm that the execution efficiency of a bioassay can be improved by up to 28% while the number of valves in the biochip can be reduced effectively.Comment: ACM/IEEE Design Automation Conference (DAC), June 201

Accelerator system for the PRISM based muon to electron conversion experiment

The next generation of lepton flavor violation experiments need high intensity and high quality muon beams. Production of such beams requires sending a short, high intensity proton pulse to the pion production target, capturing pions and collecting the resulting muons in the large acceptance transport system. The substantial increase of beam quality can be obtained by applying the RF phase rotation on the muon beam in the dedicated FFAG ring, which was proposed for the PRISM project.This allows to reduce the momentum spread of the beam and to purify from the unwanted components like pions or secondary protons. A PRISM Task Force is addressing the accelerator and detector issues that need to be solved in order to realize the PRISM experiment. The parameters of the required proton beam, the principles of the PRISM experiment and the baseline FFAG design are introduced. The spectrum of alternative designs for the PRISM FFAG ring are shown. Progress on ring main systems like injection and RF are presented. The current status of the study and its future directions are discussed.Comment: Studies performed within the PRISM Task Force initiativ

The Multi-Object, Fiber-Fed Spectrographs for SDSS and the Baryon Oscillation Spectroscopic Survey

We present the design and performance of the multi-object fiber spectrographs for the Sloan Digital Sky Survey (SDSS) and their upgrade for the Baryon Oscillation Spectroscopic Survey (BOSS). Originally commissioned in Fall 1999 on the 2.5-m aperture Sloan Telescope at Apache Point Observatory, the spectrographs produced more than 1.5 million spectra for the SDSS and SDSS-II surveys, enabling a wide variety of Galactic and extra-galactic science including the first observation of baryon acoustic oscillations in 2005. The spectrographs were upgraded in 2009 and are currently in use for BOSS, the flagship survey of the third-generation SDSS-III project. BOSS will measure redshifts of 1.35 million massive galaxies to redshift 0.7 and Lyman-alpha absorption of 160,000 high redshift quasars over 10,000 square degrees of sky, making percent level measurements of the absolute cosmic distance scale of the Universe and placing tight constraints on the equation of state of dark energy. The twin multi-object fiber spectrographs utilize a simple optical layout with reflective collimators, gratings, all-refractive cameras, and state-of-the-art CCD detectors to produce hundreds of spectra simultaneously in two channels over a bandpass covering the near ultraviolet to the near infrared, with a resolving power R = \lambda/FWHM ~ 2000. Building on proven heritage, the spectrographs were upgraded for BOSS with volume-phase holographic gratings and modern CCD detectors, improving the peak throughput by nearly a factor of two, extending the bandpass to cover 360 < \lambda < 1000 nm, and increasing the number of fibers from 640 to 1000 per exposure. In this paper we describe the original SDSS spectrograph design and the upgrades implemented for BOSS, and document the predicted and measured performances.Comment: 43 pages, 42 figures, revised according to referee report and accepted by AJ. Provides background for the instrument responsible for SDSS and BOSS spectra. 4th in a series of survey technical papers released in Summer 2012, including arXiv:1207.7137 (DR9), arXiv:1207.7326 (Spectral Classification), and arXiv:1208.0022 (BOSS Overview

A Monolithic Time Stretcher for Precision Time Recording

Identifying light mesons which contain only up/down quarks (pions) from those containing a strange quark (kaons) over the typical meter length scales of a particle physics detector requires instrumentation capable of measuring flight times with a resolution on the order of 20ps. In the last few years a large number of inexpensive, multi-channel Time-to-Digital Converter (TDC) chips have become available. These devices typically have timing resolution performance in the hundreds of ps regime. A technique is presented that is a monolithic version of ``time stretcher'' solution adopted for the Belle Time-Of-Flight system to address this gap between resolution need and intrinsic multi-hit TDC performance.Comment: 9 pages, 15 figures, minor corrections made, to appear as JINST_008

Numerical and experimental investigation of a new film cooling geometry with high P/D ratio

In order to improve the coolant surface coverage, in the past years new geometries have been proposed with higher lateral fan-shaped angle and/or greater inter-hole pitch distance (P/D). Unfortunately it is not possible to increase the fan angle or the pitch distance even further without inducing a coolant separation and a drop in the overall effectiveness. This study proposes an innovative design which improves the lateral coverage and reduces the jet lift off. The results have been validated by a combination of numerical and experimental analyses: the experimental work has been assessed on a flat plate using thermo chromic liquid crystals and the results have been confirmed numerically by the CFD with the same conditions. The CFD simulations have been carried out considering a stochastic distribution for the free stream Mach number and the coolant blowing ratio. The experimental and computational results show that the inducing lateral pressure gradients there is a minimum increase in lateral averaged adiabatic effectiveness of +30% than the baseline case until a distance downstream of 20 times the coolant diameter. © 2013 Elsevier Ltd. All rights reserved

Hydrodynamics of the Oscillating Wave Surge Converter in the open ocean

A potential flow model is derived for a large flap-type oscillating wave energy converter in the open ocean. Application of the Green's integral theorem in the fluid domain yields a hypersingular integral equation for the jump in potential across the flap. Solution is found via a series expansion in terms of the Chebyshev polynomials of the second kind and even order. Several relationships are then derived between the hydrodynamic parameters of the system. Comparison is made between the behaviour of the converter in the open ocean and in a channel. The degree of accuracy of wave tank experiments aiming at reproducing the performance of the device in the open ocean is quantified. Parametric analysis of the system is then undertaken. It is shown that increasing the flap width has the beneficial effect of broadening the bandwidth of the capture factor curve. This phenomenon can be exploited in random seas to achieve high levels of efficiency.Comment: Submitted to: EJMB/Fluids, 16/07/201

Synthesis from specifications : basic concepts

The need has evolved for a synthesis tool at the computer system level. SpecSyn is one such tool. Basically, it will view the world as a set of chips communicating via protocols. Thus, an abstract specification would get synthesized into a set of one or more interconnected chips. From that point, detail is added to each chip's specification until its structure is synthesized or it is determined that a prefabricated chip similar in functionality can be used.Features of such a tool include executable specifications from which to synthesize, constraint driven partitioning of the specifications into components (chips) and synthesis of interfaces between them, translation into VHDL and synthesis into VHDL structures of micro-architectural components, and the use of other tools (e.g. MILO, a micro-architecture and logic optimizer, and LES, a layout expert system) to evaluate the quality of the chip layout generated from VHDL description.A major component of SpecSyn is SpecCharts, a high level specification language amenable to system level synthesis, able to represent designs from system to register transfer levels. The language consists of a hierarchy of states, represented in combined graphical and textual form, at the same time catering to the expression of concurrent behavior and specification of constraints. With it we have specified several Intel chips as well as higher level systems, and have found it to be quite powerful and easy to use.SpecSyn will have a graphical interface, from which the user can at any time view or edit a SpecChart, translate to VHDL and simulate, view statistics provided by estimators (such as area, speed, and pins), store and retrieve SpecCharts, apply basic Spec Chart operations, as well as apply the partitioning algorithms or interface synthesizer. Providing access to a wide range of tools, having a single language represent the design throughout the synthesis process, and having user specified constraints allow the user to have varying amounts of control over the synthesis process