Towards Structural Testing of Superconductor Electronics

Many of the semiconductor technologies are already\ud facing limitations while new-generation data and\ud telecommunication systems are implemented. Although in\ud its infancy, superconductor electronics (SCE) is capable of\ud handling some of these high-end tasks. We have started a\ud defect-oriented test methodology for SCE, so that reliable\ud systems can be implemented in this technology. In this\ud paper, the details of the study on the Rapid Single-Flux\ud Quantum (RSFQ) process are presented. We present\ud common defects in the SCE processes and corresponding\ud test methodologies to detect them. The (measurement)\ud results prove that we are able to detect possible random\ud defects for statistical purposes in yield analysis. This\ud paper also presents possible test methodologies for RSFQ\ud circuits based on defect oriented testing (DOT)

Phase 1 of the automated array assembly task of the low cost silicon solar array project

The results of a study of process variables and solar cell variables are presented. Interactions between variables and their effects upon control ranges of the variables are identified. The results of a cost analysis for manufacturing solar cells are discussed. The cost analysis includes a sensitivity analysis of a number of cost factors

Modelling and simulation of advanced semiconductor devices

This paper presents a modelling and simulation study of advanced semiconductor devices. Different Technology Computer Aided Design approaches and models, used in nowadays research are described here. Our discussions are based on numerous theoretical approaches starting from first principle methods and continuing with discussions based on more well stablished methods such as Drift-Diffusion, Monte Carlo and Non-Equilibrium Green’s Function formalism

Engineering study for a mass memory system for advanced spacecrafts Final report, 1 Dec. 1969 - 1 Jul. 1970

Mass memory system for advanced spacecraf

Automating defects simulation and fault modeling for SRAMs

The continues improvement in manufacturing process density for very deep sub micron technologies constantly leads to new classes of defects in memory devices. Exploring the effect of fabrication defects in future technologies, and identifying new classes of realistic functional fault models with their corresponding test sequences, is a time consuming task up to now mainly performed by hand. This paper proposes a new approach to automate this procedure. The proposed method exploits the capabilities of evolutionary algorithms to automatically identify faulty behaviors into defective memories and to define the corresponding fault models and relevant test sequences. Target defects are modeled at the electrical level in order to optimize the results to the specific technology and memory architecture

Flat-plate solar array project. Volume 5: Process development

The goal of the Process Development Area, as part of the Flat-Plate Solar Array (FSA) Project, was to develop and demonstrate solar cell fabrication and module assembly process technologies required to meet the cost, lifetime, production capacity, and performance goals of the FSA Project. R&D efforts expended by Government, Industry, and Universities in developing processes capable of meeting the projects goals during volume production conditions are summarized. The cost goals allocated for processing were demonstrated by small volume quantities that were extrapolated by cost analysis to large volume production. To provide proper focus and coverage of the process development effort, four separate technology sections are discussed: surface preparation, junction formation, metallization, and module assembly

Design, fabrication, and characterization of deep-etched waveguide gratings

One-dimensional (1-D) deep-etched gratings on a specially grown AlGaAs wafer were designed and fabricated. The gratings were fabricated using state-of-the-art electron beam lithography and high-aspect-ratio reactive ion etching (RIE) in order to achieve the required narrow deep air slots with good accuracy and reproducibility. Since remarkable etch depths (up to 1.5 /spl mu/m), which completely cut through the waveguide core layer, have been attained, gratings composed of only five periods (and, thus, shorter than 6 /spl mu/m) have a bandgap larger than 100 nm. A defect was introduced by increasing the width of the central semiconductor tooth to create microcavities that exhibit a narrow transmission peak (less than 7 nm) around the wavelength of 1530 nm. The transmission spectra between 1460 and 1580 nm have been systematically measured, and the losses have been estimated for a set of gratings, both with and without a defect, for different periods and air slot dimensions. Numerical results obtained via a bidirectional beam propagation code allowed the evaluation of transmissivity, reflectivity, and diffraction losses. By comparing experimental results with the authors' numerical findings, a clear picture of the role of the grating's geometric parameters in determining its spectral features and diffractive losses is illustrated

Phase 1 of the automated array assembly task of the low cost silicon solar array project

The state of technology readiness for the automated production of solar cells and modules is reviewed. Individual process steps and process sequences for making solar cells and modules were evaluated both technically and economically. High efficiency with a suggested cell goal of 15% was stressed. It is concluded that the technology exists to manufacture solar cells which will meet program goals