Burst-by-Burst Adaptive Decision Feedback Equalised TCM, TTCM and BICM for H.263-Assisted Wireless Video Telephony

Decision Feedback Equaliser (DFE) aided wideband Burst-by-Burst (BbB) Adaptive Trellis Coded Modulation (TCM), Turbo Trellis Coded Modulation (TTCM) and Bit-Interleaved Coded Modulation (BICM) assisted H.263-based video transceivers are proposed and characterised in performance terms when communicating over the COST 207 Typical Urban wideband fading channel. Specifically, four different modulation modes, namely 4QAM, 8PSK, 16QAM and 64QAM are invoked and protected by the above-mentioned coded modulation schemes. The TTCM assisted scheme was found to provide the best video performance, although at the cost of the highest complexity. A range of lower-complexity arrangements will also be characterised. Finally, in order to confirm these findings in an important practical environment, we have also investigated the adaptive TTCM scheme in the CDMA-based Universal Mobile Telecommunications System's (UMTS) Terrestrial Radio Access (UTRA) scenario and the good performance of adaptive TTCM scheme recorded when communicating over the COST 207 channels was retained in the UTRA environment

Improved side information generation for distributed video coding

As a new coding paradigm, distributed video coding (DVC) deals with lossy source coding using side information to exploit the statistics at the decoder to reduce computational demands at the encoder. The performance of DVC highly depends on the quality of side information. With a better side information generation method, fewer bits will be requested from the encoder and more reliable decoded frames will be obtained. In this paper, a side information generation method is introduced to further improve the rate-distortion (RD) performance of transform domain distributed video coding. This algorithm consists of a variable block size based Y, U and V component motion estimation and an adaptive weighted overlapped block motion compensation (OBMC). The proposal is tested and compared with the results of an executable DVC codec released by DISCOVER group (DIStributed COding for Video sERvices). RD improvements on the set of test sequences are observed

An augmented reality interface for visualising and interacting with virtual content

In this paper, a novel AR interface is proposed that provides generic solutions to the tasks involved in augmenting simultaneously different types of virtual information and processing of tracking data for natural interaction. Participants within the system can experience a real-time mixture of 3D objects, static video, images, textual information and 3D sound with the real environment. The userfriendly AR interface can achieve maximum interaction using simple but effective forms of collaboration based on the combinations of humancomputer interaction techniques. To prove the feasibility of the interface, the use of indoor AR techniques are employed to construct innovative applications and demonstrate examples from heritage to learning systems. Finally, an initial evaluation of the AR interface including some initial results is presented

Side information exploitation, quality control and low complexity implementation for distributed video coding

Distributed video coding (DVC) is a new video coding methodology that shifts the highly complex motion search components from the encoder to the decoder, such a video coder would have a great advantage in encoding speed and it is still able to achieve similar rate-distortion performance as the conventional coding solutions. Applications include wireless video sensor networks, mobile video cameras and wireless video surveillance, etc. Although many progresses have been made in DVC over the past ten years, there is still a gap in RD performance between conventional video coding solutions and DVC. The latest development of DVC is still far from standardization and practical use. The key problems remain in the areas such as accurate and efficient side information generation and refinement, quality control between Wyner-Ziv frames and key frames, correlation noise modelling and decoder complexity, etc. Under this context, this thesis proposes solutions to improve the state-of-the-art side information refinement schemes, enable consistent quality control over decoded frames during coding process and implement highly efficient DVC codec. This thesis investigates the impact of reference frames on side information generation and reveals that reference frames have the potential to be better side information than the extensively used interpolated frames. Based on this investigation, we also propose a motion range prediction (MRP) method to exploit reference frames and precisely guide the statistical motion learning process. Extensive simulation results show that choosing reference frames as SI performs competitively, and sometimes even better than interpolated frames. Furthermore, the proposed MRP method is shown to significantly reduce the decoding complexity without degrading any RD performance. To minimize the block artifacts and achieve consistent improvement in both subjective and objective quality of side information, we propose a novel side information synthesis framework working on pixel granularity. We synthesize the SI at pixel level to minimize the block artifacts and adaptively change the correlation noise model according to the new SI. Furthermore, we have fully implemented a state-of-the-art DVC decoder with the proposed framework using serial and parallel processing technologies to identify bottlenecks and areas to further reduce the decoding complexity, which is another major challenge for future practical DVC system deployments. The performance is evaluated based on the latest transform domain DVC codec and compared with different standard codecs. Extensive experimental results show substantial and consistent rate-distortion gains over standard video codecs and significant speedup over serial implementation. In order to bring the state-of-the-art DVC one step closer to practical use, we address the problem of distortion variation introduced by typical rate control algorithms, especially in a variable bit rate environment. Simulation results show that the proposed quality control algorithm is capable to meet user defined target distortion and maintain a rather small variation for sequence with slow motion and performs similar to fixed quantization for fast motion sequence at the cost of some RD performance. Finally, we propose the first implementation of a distributed video encoder on a Texas Instruments TMS320DM6437 digital signal processor. The WZ encoder is efficiently implemented, using rate adaptive low-density-parity-check accumulative (LDPCA) codes, exploiting the hardware features and optimization techniques to improve the overall performance. Implementation results show that the WZ encoder is able to encode at 134M instruction cycles per QCIF frame on a TMS320DM6437 DSP running at 700MHz. This results in encoder speed 29 times faster than non-optimized encoder implementation. We also implemented a highly efficient DVC decoder using both serial and parallel technology based on a PC-HPC (high performance cluster) architecture, where the encoder is running in a general purpose PC and the decoder is running in a multicore HPC. The experimental results show that the parallelized decoder can achieve about 10 times speedup under various bit-rates and GOP sizes compared to the serial implementation and significant RD gains with regards to the state-of-the-art DISCOVER codec

Video streaming over Bluetooth

In recent years, multimedia content has become more accessible to mobile phone devices increasing the demand for multimedia services. Streaming video to or from mobile phones over mobile phone operator networks is one option. In this paper we report on the result of a study which analyzes the suitability of using the Bluetooth network as a last hop network for streaming video to and from mobile phone devices. A number of studies have been reported in the literature, simulating video streaming over Bluetooth. However, few field studies have been reported fuelling the need to build an implementation infrastructure to conduct an empirical study using mobile phone devices, in video streaming applications. In our study we have implemented a testbed comprising a Linux-based Bluetooth video-streaming gateway and a Nokia mobile phone device to stream video clips and real-time video to and from the mobile phone over a Bluetooth connection, using both pre-recorded video and real-time streams from the mobile phone's onboard video camera. The testbed allows various Bluetooth network protocols and parameters to be tested in our framework. The work carried out reinforces the impor-tance of adequate packetization, which proved to be beneficial even with higher protocol layers such as the L2CAP protocol. The data throughputs achieved using Bluetooth v1.1 and Bluetooth v2.0 adapters were also compared and the effect of Wi-Fi interference proved to be detrimental to the performance of the Bluetooth network's data throughput. The use of L2CAP and RFCOMM sockets were compared, highlighting the importance of the choice of an adequate protocol. Video quality degradation at different distances when transferring video over Bluetooth was measured in terms of the mean square error metric. It was shown that the mobile phone device is indeed a resource constrained device and special care must be taken to ensure working streaming-video solutions over Blue-tooth.peer-reviewe

Complexity management of H.264/AVC video compression.

The H. 264/AVC video coding standard offers significantly improved compression efficiency and flexibility compared to previous standards. However, the high computational complexity of H. 264/AVC is a problem for codecs running on low-power hand held devices and general purpose computers. This thesis presents new techniques to reduce, control and manage the computational complexity of an H. 264/AVC codec. A new complexity reduction algorithm for H. 264/AVC is developed. This algorithm predicts "skipped" macroblocks prior to motion estimation by estimating a Lagrange ratedistortion cost function. Complexity savings are achieved by not processing the macroblocks that are predicted as "skipped". The Lagrange multiplier is adaptively modelled as a function of the quantisation parameter and video sequence statistics. Simulation results show that this algorithm achieves significant complexity savings with a negligible loss in rate-distortion performance. The complexity reduction algorithm is further developed to achieve complexity-scalable control of the encoding process. The Lagrangian cost estimation is extended to incorporate computational complexity. A target level of complexity is maintained by using a feedback algorithm to update the Lagrange multiplier associated with complexity. Results indicate that scalable complexity control of the encoding process can be achieved whilst maintaining near optimal complexity-rate-distortion performance. A complexity management framework is proposed for maximising the perceptual quality of coded video in a real-time processing-power constrained environment. A real-time frame-level control algorithm and a per-frame complexity control algorithm are combined in order to manage the encoding process such that a high frame rate is maintained without significantly losing frame quality. Subjective evaluations show that the managed complexity approach results in higher perceptual quality compared to a reference encoder that drops frames in computationally constrained situations. These novel algorithms are likely to be useful in implementing real-time H. 264/AVC standard encoders in computationally constrained environments such as low-power mobile devices and general purpose computers

A DSP Based H.264 Decoder for a Multi-Format IP Set-Top Box

In this paper, the implementation of a digital signal processor (DSP) based H.264 decoder for a multi-format set-top box is described. Baseline and main profiles are supported. Using several software optimization techniques, the decoder has been fitted into a low-cost DSP. The decoder alone has been tested in simulation, achieving real-time performance with a 600 MHz system clock. Moreover, it has been integrated in a multi-format IP set-top box allowing the implementation of actual environment tests with excellent results. Finally, the decoder has been ported to a latest generation DSP

Performance of LTE network for VoIP users

With the arrival of LTE standard, it is expected that the mobile voice services paradigm will shift from the circuit switched to fully packet switched mode supporting the VoIP services. VoIP services took quite a bit of time before they were accepted as the main stream telephony service in the fixed networks. To provide VoIP services over the LTE networks with appropriate QoS, it is necessary to analyse the performance of such services and optimise the network parameters. This paper analyses the performance of VoIP services on the LTE network using the FD and the SMP packet scheduling techniques. This work identifies and analyses the features of above LTE packet scheduling techniques to enhance the QoS of VoIP services. An OPNET-based simulation model is used to analyse the performance of VoIP services on the LTE network by incorporating G.711 and G.723 speech coders. The work also studied the performance of VoIP services in variable transmission channel conditions

Low power context adaptive variable length encoder in H.264

The adoption of digital TV, DVD video and Internet streaming led to the development of Video compression. H.264/AVC is the industry standard delivering highly efficient and reliable video compression. In this Video compression standard, H.264/AVC one of the technical developments adopted is the Context adaptive entropy coding schemes. This thesis developed a complete VHDL behavioral model of a variable length encoder. A synthesizable hardware description is then developed for components of the variable length encoder using Synopsys tools. Many implementations were focused on density and speed to reduce the hardware cost and improve quality but with higher power consumption. Low power consumption of an IC leads to lower heat dissipation and thereby reduces the need for bigger heat sinking devices. Reducing the need for heat sinking devices can provide lot of advantages to the manufacturers in terms of cost and size of the end product. Focus towards smaller area with higher power consumption may not be appropriate for some end products that need thinner mechanical enclosures because even if the design has smaller area it needs a bigger heat sink thereby making the enclosures bigger. This thesis therefore aimed at low power consumption without compromising much on the area. The designed architecture enables real-time processing for QCIF and CIF frames with 60-fps using 100MHz clock. The resultant hardware power is 1.4mW at 100MHz using 65nm technology. The total logic gate count is 32K gates