Maximal Bootstrap Percolation Time on the Hypercube via Generalised Snake-in-the-Box

In $r$-neighbour bootstrap percolation, vertices (sites) of a graph $G$ are infected, round-by-round, if they have $r$ neighbours already infected. Once infected, they remain infected. An initial set of infected sites is said to percolate if every site is eventually infected. We determine the maximal percolation time for $r$-neighbour bootstrap percolation on the hypercube for all $r \geq 3$ as the dimension $d$ goes to infinity up to a logarithmic factor. Surprisingly, it turns out to be $\frac{2^d}{d}$, which is in great contrast with the value for $r=2$, which is quadratic in $d$, as established by Przykucki. Furthermore, we discover a link between this problem and a generalisation of the well-known Snake-in-the-Box problem.Comment: 14 pages, 1 figure, submitte

On the Sandpile group of the cone of a graph

In this article, we give a partial description of the sandpile group of the cone of the cartesian product of graphs in function of the sandpile group of the cone of their factors. Also, we introduce the concept of uniform homomorphism of graphs and prove that every surjective uniform homomorphism of graphs induces an injective homomorphism between their sandpile groups. As an application of these result we obtain an explicit description of a set of generators of the sandpile group of the cone of the hypercube of dimension d.Comment: 20 pages, 11 figures. The title was changed, other impruvements were made throughout the article. To appear in Linear Algebra and Its Application

Quantum Error Correcting Codes Using Qudit Graph States

Graph states are generalized from qubits to collections of $n$ qudits of arbitrary dimension $D$, and simple graphical methods are used to construct both additive and nonadditive quantum error correcting codes. Codes of distance 2 saturating the quantum Singleton bound for arbitrarily large $n$ and $D$ are constructed using simple graphs, except when $n$ is odd and $D$ is even. Computer searches have produced a number of codes with distances 3 and 4, some previously known and some new. The concept of a stabilizer is extended to general $D$, and shown to provide a dual representation of an additive graph code.Comment: Version 4 is almost exactly the same as the published version in Phys. Rev.

On palimpsests in neural memory: an information theory viewpoint

The finite capacity of neural memory and the reconsolidation phenomenon suggest it is important to be able to update stored information as in a palimpsest, where new information overwrites old information. Moreover, changing information in memory is metabolically costly. In this paper, we suggest that information-theoretic approaches may inform the fundamental limits in constructing such a memory system. In particular, we define malleable coding, that considers not only representation length but also ease of representation update, thereby encouraging some form of recycling to convert an old codeword into a new one. Malleability cost is the difficulty of synchronizing compressed versions, and malleable codes are of particular interest when representing information and modifying the representation are both expensive. We examine the tradeoff between compression efficiency and malleability cost, under a malleability metric defined with respect to a string edit distance. This introduces a metric topology to the compressed domain. We characterize the exact set of achievable rates and malleability as the solution of a subgraph isomorphism problem. This is all done within the optimization approach to biology framework.Accepted manuscrip

A parallel algorithm for switch-level timing simulation on a hypercube multiprocessor

The parallel approach to speeding up simulation is studied, specifically the simulation of digital LSI MOS circuitry on the Intel iPSC/2 hypercube. The simulation algorithm is based on RSIM, an event driven switch-level simulator that incorporates a linear transistor model for simulating digital MOS circuits. Parallel processing techniques based on the concepts of Virtual Time and rollback are utilized so that portions of the circuit may be simulated on separate processors, in parallel for as large an increase in speed as possible. A partitioning algorithm is also developed in order to subdivide the circuit for parallel processing