The SIGNAL Approach to the Design of System Architectures

International audienceModeling plays a central role in system engineering. It significantly reduces costs and efforts in the design by providing developers with means for cheaper and more relevant experimentations. So, design choices can be assessed earlier. The use of a formalism, such as the synchronous language SIGNAL which relies on solid mathematical foundations for the modeling, allows validation. This is the aim of the methodology defined for the design of embedded systems where emphasis is put on formal techniques for verification, analysis, and code generation. This paper mainly focuses on the modeling of architecture components using SIGNAL. For illustration, we consider the modeling of a bounded FIFO queue, which is intended to be used for communication protocols. We bring out the capabilities of SIGNAL to allow specifications in an elegant way, and we check few elementary properties on the resulting model for correctness

High rates of fuel consumption are not required by insulating motifs to suppress retroactivity in biochemical circuits

Retroactivity arises when the coupling of a molecular network $\mathcal{U}$ to a downstream network $\mathcal{D}$ results in signal propagation back from $\mathcal{D}$ to $\mathcal{U}$. The phenomenon represents a breakdown in modularity of biochemical circuits and hampers the rational design of complex functional networks. Considering simple models of signal-transduction architectures, we demonstrate the strong dependence of retroactivity on the properties of the upstream system, and explore the cost and efficacy of fuel-consuming insulating motifs that can mitigate retroactive effects. We find that simple insulating motifs can suppress retroactivity at a low fuel cost by coupling only weakly to the upstream system $\mathcal{U}$. However, this design approach reduces the signalling network's robustness to perturbations from leak reactions, and potentially compromises its ability to respond to rapidly-varying signals.Comment: 26 pages, 19 figures, To appear in Engineering Biolog

Simplified small-signal stability analysis for optimized power system architecture

The optimization of power architectures is a complex problem due to the plethora of different ways to connect various system components. This issue has been addressed by developing a methodology to design and optimize power architectures in terms of the most fundamental system features: size, cost and efficiency. The process assumes various simplifications regarding the utilized DC/DC converter models in order to prevent the simulation time to become excessive and, therefore, stability is not considered. The objective of this paper is to present a simplified method to analyze small-signal stability of a system in order to integrate it into the optimization methodology. A black-box modeling approach, applicable to commercial converters with unknown topology and components, is based on frequency response measurements enabling the system small-signal stability assessment. The applicability of passivity-based stability criterion is assessed. The stability margins are stated utilizing a concept of maximum peak criteria derived from the behavior of the impedance-based sensitivity function that provides a single number to state the robustness of the stability of a well-defined minor-loop gain

A diversity combining antenna array for land mobile satellite communications

A unified approach to adaptive antenna array design and transceiver signal processing architectures is proposed for the user segment of the land mobile satellite communication service. This technique is described in its conceptual form, and compared with steered antenna array configurations currently favored for this class communication system. The proposed system uses established diversity combining techniques previously developed for mobile terrestrial radio. It is suggested that a diversity-based receiver architecture would allow the coherent recombination of the multipath signal energy present at the mobile terminal site, and thereby enhance system performance for a given link budget. The cophasing of the multipath signals can be implemented using a FFSR (feedforward signal regeneration) signal-processing architecture, which uses the presence of a pilot-tone within the communications channel. On transmit, a retrodirective beam is formed towards the active satellite. The economic viability of such a transceiver is also considered

Design exploration and HW/SW rapid prototyping for real-time system design

Embedded signal processing systems are usually associated with real-time constraints and/or high data rates such that fully software implementation are often not satisfactory. In that case, mixed hardware/software implementations are to be investigated. However the increasing complexity of current applications makes classical design processes time consuming and consequently incompatible with an efficient design space exploration. To address this problem, we propose a system-level design based methodology that aims at unifying the design flow from the functional description to the physical HW/SW implementation through functional and architectural flexibility. Our approach consists in automatically refining high abstraction level models through the use of an electronic system-level (ESL) design tool according to function models from the one hand and prototyping platform models from the other hand. We illustrate our methodology with the design of a wireless communication system. We provide design results showing the variety of dedicated architectures that can be investigated with this design flow

Array Architectures and Physical Layer Design for Millimeter-Wave Communications Beyond 5G

Ever increasing demands in mobile data rates have resulted in exploration of millimeter-wave (mmW) frequencies for the next generation (5G) wireless networks. Communications at mmW frequencies is presented with two keys challenges. Firstly, high propagation loss requires base stations (BSs) and user equipment (UEs) to use a large number of antennas and narrow beams to close the link with sufficient received signal power. Consequently, communications using narrow beams create a new challenge in channel estimation and link establishment based on fine angular probing. Current mmW system use analog phased arrays that can probe only one angle at the time which results in high latency during link establishment and channel tracking. It is desirable to design low latency beam training by exploring both physical layer designs and array architectures that could replace current 5G approaches and pave the way to the communications for frequency bands in higher mmW band and sub-THz region where larger antenna arrays and communications bandwidth can be exploited. To this end, we propose a novel signal processing techniques exploiting unique properties of mmW channel, and show both theoretically, in simulation and experiments its advantages over conventional approaches. Secondly, we explore different array architecture design and analyze their trade-offs between spectral efficiency and power consumption and area. For comprehensive comparison, we have developed a methodology for optimal design of system parameters for different array architecture candidates based on the spectral efficiency target, and use these parameters to estimate the array area and power consumption based on the circuits reported in the literature. We show that the hybrid analog and digital architectures have severe scalability concerns in radio frequency signal distribution with increased array size and spatial multiplexing levels, while the fully-digital array architectures have the best performance and power/area trade-offs.The developed approaches are based on a cross-disciplinary research that combines innovation in model based signal processing, machine learning, and radio hardware. This work is the first to apply compressive sensing (CS), a signal processing tool that exploits sparsity of mmW channel model, to accelerate beam training of mmW cellular system. The algorithm is designed to address practical issues including the requirement of cell discovery and synchronization that involves estimation of angular channel together with carrier frequency offset and timing offsets. We have analyzed the algorithm performance in the 5G compliant simulation and showed that an order of magnitude saving is achieved in initial access latency for the desired channel estimation accuracy. Moreover, we are the first to develop and implement a neural network assisted compressive beam alignment to deal with hardware impairments in mmW radios. We have used 60GHz mmW testbed to perform experiments and show that neural networks approach enhances alignment rate compared to CS. To further accelerate beam training, we proposed a novel frequency selective probing beams using the true-time-delay (TTD) analog array architecture. Our approach utilizes different subcarriers to scan different directions, and achieves a single-shot beam alignment, the fastest approach reported to date. Our comprehensive analysis of different array architectures and exploration of emerging architectures enabled us to develop an order of magnitude faster and energy efficient approaches for initial access and channel estimation in mmW systems

Design, modeling, and analysis of multi-channel demultiplexer/demodulator

Traditionally, satellites have performed the function of a simple repeater. Newer data distribution satellite architectures, however, require demodulation of many frequency division multiplexed uplink channels by a single demultiplexer/demodulator unit, baseband processing and routing of individual voice/data circuits, and remodulation into time division multiplexed (TDM) downlink carriers. The TRW MCDD (Multichannel Demultiplexer/Multirate Demodulator) operates on a 37.4 MHz composite input signal. Individual channel data rates are either 64 Kbps or 2.048 Mbps. The wideband demultiplexer divides the input signal into 1.44 MHz segments containing either a single 2.048 Mbps channel or thirty two 64 Kbps channels. In the latter case, the narrowband demultiplexer further divides the single 1.44 MHz wideband channel into thirty two 45 KHz narrowband channels. With this approach the time domain Fast Fourier Transformation (FFT) channelizer processing capacity is matched well to the bandwidth and number of channels to be demultiplexed. By using a multirate demodulator fewer demodulators are required while achieving greater flexibility. Each demodulator can process a wideband channel or thirty two narrowband channels. Either all wideband channels, a mixture of wideband and narrowband channels, or all narrowband channels can be demodulated. The multirate demodulator approach also has lower nonrecurring costs since only one design and development effort is needed. TRW has developed a proof of concept (POC) model which fully demonstrates the signal processing fuctions of MCDD. It is capable of processing either three 2.048 Mbps channels or two 2.048 Mbps channels and thirty two 64 Kbps channels. An overview of important MCDD system engineering issues is presented as well as discussion on some of the Block Oriented System Simulation analyses performed for design verification and selection of operational parameters of the POC model. Systems engineering analysis of the POC model confirmed that the MCDD concepts are not only achievable but also balance the joint goals of minimizing on-board complexity and cost of ground equipment, while retaining the flexibility needed to meet a wide range of system requirements

Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms

The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision systems, this means propagating system-level specifications down to particular specifications for e. g. the image sensor, the image processor, etc. This permits to adopt different design strategies for each one of them, as long as they meet their own specifications. This approach can lead to over-design, which is not always affordable. Conversely, if higher-level specifications are too tight, they can lead to impossible specifications at the lower levels. This is certainly the case for embedded vision systems in which high-performance needs to be paired with a very restricted power budget. In order to explore alternative architectures, we need tools that allow for simultaneous optimization of different blocks. However, the link between low-level non-idealities and high-level performance is missing. CAD tools for the design and verification of analog and mixed-signal integrated circuits are not well suited for the simulation of higher-level functionalities. Our approach is to extract relevant data from circuit-level simulation and to build an OpenCV model to be employed in the design of the algorithm. The utility of this approach is illustrated by the evaluation of the effect of column-wise and pixel-wise FPN at the sensor on the performance of Viola-Jones face detection