Fully Integrated Voltage Reference Circuits

(Doktora) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2014(PhD) -- İstanbul Technical University, Institute of Science and Technology, 2014Gerilim referans devreleri, elektriksel sistemlerde diğer alt blokların çalışmaları için kararlı bir çalışma noktası üretmeleri sebebiyle veri dönüştürücüler (ADC - DAC), frekans sentezleyiciler, DC-DC ve AC-DC dönüştürücüler ve lineer regülatörler gibi pek çok elektriksel sistemin en temel yapı bloklarındandır. İdeal olarak, üretilen bu referans noktası, sıcaklık, üretim süreçleri, besleme gerilim degişimleri ve yükleme etkileri gibi çalışma koşullarından etkilenmemelidir. Bir referans devresinin doğruluğu bahsedilen çalışma koşullarının etkisiyle mutlak değerinden ne kadar saptığı olarak tanımlanır. Modern haberleşme sistemleri ve tüketici ürünlerindeki gelişmeler ile birlikte yüksek entegrasyon ve doğruluklu sistemlere olan talep artmıştır. Tümdevre sistemlerinde, alt blokların çalışma noktalarını belirlemesi nedeniyle özellikle referans devrelerinin performansları bütün sistemin performansının belirlenmesinde önemli rol oynamaktadır. Dolayısıyla yüksek performanslı sistemlere olan talep, bu performansların elde edilmesi için kullanılan düşük geometrili üretim teknolojilerine uygun, yani giderek azalan besleme gerilimleri ile çalışabilecek yüksek doğruluklu referans devrelerine olan talebi de arttırmıştır. Bu nedenle bu çalışmada gerilim referans devre topolojilerine odaklanılmıştır. Bu doğrultuda, öncelikle yüksek doğruluklu, düşük gürültülü gerilim refereans devre topolojileri üzerinde çalışılarak 0.35 um CMOS teknoljisinde farklı tasarımlar yapılmıştır. Bu aşamada temel hedef, yüksek dogrulukluk olarak belirenmiş ve yapılan tasarımlarda, üretim sonrası ayarlamalardan sonra sıcaklık katsayısı 3 ppm/C olabilecek devreler tasarlanmıştır. Ancak, 0.35 um CMOS üretim teknolojisi kullanılması ve kullanılan topolojiler dolayısıyla, devrelerin çalışabileceği minimum besleme gerilim seviyesi 1.8 V ile sınırlı kalmıştır. Devrelerin çektikleri akımlar ise 20-30 uA seviyesindedir. Bu tasarımlar sırasında (triple-well üretim teknlojileri için), önerilen blok gövde izolasyon stratejisi, tasarımı yapılan devrenin gövdesinin tümdevrenin geri kalan kısmından ters kutuplanmış bir jonksiyon diyodu sayesinde izole edilmesine dayanmaktadır ve devrenin gövde gürültüsünden etkilenmesini önemli ölçüde azaltmaktadır. Son olarak, çoğunlukla osilatör devrelerinde uygulanan anahtarlamalı kutuplama tekniği uygulanarak devrelerin düşük frekans gürültü performansının iyileştirilmesi amaçlanmıştır. Çalışmanın geri kalan kısmında, düşük besleme gerilimleriyle çalışabilecek mikron-altı üretim teknolojilerine uygun gerilim referans devre topolojileri üzerine odaklanılmıştır. Bu doğrultuda, iki yeni düşük besleme gerilimli ve düşük güç tüketimli gerilim referans devre topolojisi önerilmiştir. Önerilen topolojiler, 0.18 um CMOS üretim teknolojisinde gerçeklenmiştir. Ölçüm sonuçları, tasarlanan gerilim refarans devrelerinin 0.65 V besleme gerilimi ile çalışabildiğini göstermiştir. Önerilen devre topolojileri ile 0-120 C sıcaklık aralığında, sıcaklık katsayısı 50 ppm/C olan 193 mV seviyesinde referans gerilimleri elde edilmiştir. Devrelerin güç tüketimleri sırasıyla 0.3 uW ve 0.4 uW iken kapladıkları alan 0.2 mm^2 ve 0.08 mm^2 dir. Sonuç olarak, önerilen devre topolojileri ile literatürde yer alan diğer 1V-altı referans devreleri ile karşılatrılabilir seviyede sıcaklık katsayısı olan referans gerilimleri çok daha düşük güç harcamasıyla elde edilmiştir.Voltage references are one of the basic building blocks of many SoCs and mixed-signal ICs such as data converters, voltage regulators and operational amplifiers as they constitute a stable reference voltage for other sub-circuits to generate predictable and repeatable results. Ideally, this reference point should not change with external influences or operating conditions such as temperature, fabrication process variations, power supply variations and transient loading effects. Along with the rapid development of modern communication systems and consumer products, which constitutes the main market for semiconductor industry, the market demand for these System on Chip (SoC) or Mixed Signal ICs to have lower power consumption, higher accuracy and lower cost, and thus, higher integration. Since the performance of the whole system depends strongly to the performance of the reference circuit, this work is focused on fully integrated voltage reference architectures. With this motivation, firstly, different kinds of high precision low noise voltage reference circuits are designed in standard 0.35 um CMOS technology that we have more experience and knowledge of. The essential goal of these studies was high precision and temperature coefficient of the designed voltage reference circuits are on the order of 3 ppm/C with trimming after production. However, since 0.35 um CMOS technology is used in these designs and also due to the chosen topologies their minimum supply voltage can be down to 1.8 V and while current consumption is on the order of 20-30 uA. In the design of the this voltage reference block bulk isolation technique is proposed (for triple-well CMOS processes), in which system blocks are bulk isolated by a reverse biased junction diode from the rest of the die to drastically reduce substrate noise coupling. This is especially important if a very low power voltage reference is designed in a very noisy SoC. Moreover, the switched biasing technique, which is mostly applied to the oscillators, is also implemented to the designed BGR in order to improve the low noise performance of the circuit. The rest of the thesis is focused on new voltage reference topologies that are appropriate for sub-micron technologies operating with low supply voltages. With this motivation two new low voltage and low power voltage reference topologies are proposed. The proposed voltage reference topologies are implemented and fabricated in 0.18 um CMOS technology. Measurement results show that the proposed voltage reference circuits are working properly down to 0.65 V and achieve an output voltage of 193 mV with a temperature coefficient on the order of 50 ppm/C in the temperature range of 0-120C. The total power consumption of the two designed voltage references are 0.3 uW and 0.4 uW at 27 C, while occupying the area of 0.2 mm^2 and 0.08 mm^2, respectively. As a result, the proposed voltage reference topologies generate a reference voltage with comparable level of temperature coefficient and quite low power consumption with respect to the other sub-1V voltage reference circuits reported in the literature.DoktoraPh

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