An Analysis of the Unmanned Aerial Systems-to-Ground Channel and Joint Sensing and Communications Systems Using Software Defined Radio

abstract: Software-defined radio provides users with a low-cost and flexible platform for implementing and studying advanced communications and remote sensing applications. Two such applications include unmanned aerial system-to-ground communications channel and joint sensing and communication systems. In this work, these applications are studied. In the first part, unmanned aerial system-to-ground communications channel models are derived from empirical data collected from software-defined radio transceivers in residential and mountainous desert environments using a small (< 20 kg) unmanned aerial system during low-altitude flight (< 130 m). The Kullback-Leibler divergence measure was employed to characterize model mismatch from the empirical data. Using this measure the derived models accurately describe the underlying data. In the second part, an experimental joint sensing and communications system is implemented using a network of software-defined radio transceivers. A novel co-design receiver architecture is presented and demonstrated within a three-node joint multiple access system topology consisting of an independent radar and communications transmitter along with a joint radar and communications receiver. The receiver tracks an emulated target moving along a predefined path and simultaneously decodes a communications message. Experimental system performance bounds are characterized jointly using the communications channel capacity and novel estimation information rate.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS

© 2017 Elsevier Ltd. All rights reserved.A 0.1–5.0 GHz flexible software-defined radio (SDR) receiver with digitally assisted calibration is presented, employing a zero-IF/low-IF reconfigurable architecture for both wideband and narrowband applications. The receiver composes of a main-path based on a current-mode mixer for low noise, a high linearity sub-path based on a voltage-mode passive mixer for out-of-band rejection, and a harmonic rejection (HR) path with vector gain calibration. A dual feedback LNA with “8” shape nested inductor structure, a cascode inverter-based TCA with miller feedback compensation, and a class-AB full differential Op-Amp with Miller feed-forward compensation and QFG technique are proposed. Digitally assisted calibration methods for HR, IIP2 and image rejection (IR) are presented to maintain high performance over PVT variations. The presented receiver is implemented in 65 nm CMOS with 5.4 mm2 core area, consuming 9.6–47.4 mA current under 1.2 V supply. The receiver main path is measured with +5 dB m/+5dBm IB-IIP3/OB-IIP3 and +61dBm IIP2. The sub-path achieves +10 dB m/+18dBm IB-IIP3/OB-IIP3 and +62dBm IIP2, as well as 10 dB RF filtering rejection at 10 MHz offset. The HR-path reaches +13 dB m/+14dBm IB-IIP3/OB-IIP3 and 62/66 dB 3rd/5th-order harmonic rejection with 30–40 dB improvement by the calibration. The measured sensitivity satisfies the requirements of DVB-H, LTE, 802.11 g, and ZigBee.Peer reviewedFinal Accepted Versio

Design Characterization and Verification of Channel Bandwidth Selectivity and Linearity Performance of I/Q Baseband Receiver SoC

This paper presents the methodologies used to characterize and verify critical parameters of a differential In-phase/Quadrature (I/Q) baseband channel of an integrated circuits system, consisting of amplifiers and filters in a single chip radio transceiver. It is a highly compact circuit of novel Software Defined Radio (SDR), System-on-Chip (SoC) to support Multi-Band and Multi-Mode operation. The architecture is designed to fulfill the critical requirements of very low power consumption, high linearity, very low noise floor, optimized chip size and high reliability for wideband radio networks transceiver applications. Integrating the entire wireless transceiver system into a single chip can greatly minimize its size, simplify assembly process, and decrease manufacturing costs. However, the characterization and verification processes of such customized SoC is very much daunting and time consuming. This paper discusses an industrial standard procedure to verify such requirements in complex design and development stages. In general, the required receiver baseband path consists of amplifiers and filters line-up to perform 75dB Inter-Modulation Distortion (IMD) suppression or blocking capability. Detailed parameters subjected to characterization are shown and verified to the specification of SDR transceiver SoC . The SoC architecture has low noise amplifier (LNA), local oscillator, down conversion mixer, post mixer amplifier, and baseband path. The baseband path includes several receiver components, such as amplifiers and low pass filters (LPFs) producing low BW selectivity errors, high linearity, and low baseband noise. Finally, the critical parameters of the amplifier and filter blocks are measured and verified to satisfy the required design specifications

Signal Quality Monitoring of GNSS Signals Using a Chip Shape Deformation Metric

The Global Navigation Satellite System continues to become deeply em-bedded within modern civilization, and is depended on for confident, accurate navigation information. High precision position and timing accuracy is typically achieved using differential processing, however these systems provide limited compensation for distortions caused by multi-path or faulty satellite hardware. Signal Quality Monitoring (SQM) aims to provide confidence in a receivers Position, Navigation, and Timing solution and to offer timely warnings in the event that signal conditions degrade to unsafe levels. The methods presented in this document focus on implementing effective SQM using low-cost Commercial Off-the-Shelf equipment, a Software Defined Radio, and a typical software receiver architecture that tracks the Galileo E1C signals and the Global Positioning System L1 Coarse-Acquisition signals. Techniques are centered on acquiring and discriminating signal chip shapes with a goal of identifying both 1) clean and 2) deformed signals. The demonstrated identification method is relevant to the growing significance of SQM for SoL applications while providing benefit for confidently monitoring received GNSS signal integrity without requiring specialized receiver hardware

Capture of UAVs through GPS spoofing using low-cost SDR platforms

The increased use of unmanned aerial vehicles (UAVs), better known as drones, by civilians has grown exponentially and their autonomous flight control systems have improved significantly, which has resulted in a greater number of accidents and dangerous situations. To help resolve this problem, in this paper, we address the use of low-cost Software Defined Radio (SDR) platforms for simulating a global navigation satellite system (GNSS), more specifically the global positioning system (GPS), in order to transmit false signals and induce a location error on the targeted GPS receiver. Using this approach, a defensive system can be implemented which can divert, or even take control of unauthorized UAVs whose flight path depends on the information obtained by the GPS system.info:eu-repo/semantics/acceptedVersio

A Reconfigurable Tile-Based Architecture to Compute FFT and FIR Functions in the Context of Software-Defined Radio

Software-defined radio (SDR) is the term used for flexible radio systems that can deal with multiple standards. For an efficient implementation, such systems require appropriate reconfigurable architectures. This paper targets the efficient implementation of the most computationally intensive kernels of two significantly different standards, viz. Bluetooth and HiperLAN/2, on the same reconfigurable hardware. These kernels are FIR filtering and FFT. The designed architecture is based on a two-dimensional arrangement of 17 tiles. Each tile contains a multiplier, an adder, local memory and multiplexers allowing flexible communication with the neighboring tiles. The tile-base data path is complemented with a global controller and various memories. The design has been implemented in SystemC and simulated extensively to prove equivalence with a reference all-software design. It has also been synthesized and turns out to outperform significantly other reconfigurable designs with respect to speed and area

Nomadic Base Station (NBS): a Software Defined Radio (SDR) based Architecture for Capacity Enhancement in Mobile Communications Networks

In this research work, the problem of congestion that leads to dropped calls at GSM cell sites and drastic reduction in network capacity is addressed. We designed a novel GSM base station architecture named Nomadic Base Station (NBS) which is based on Software Defined Radio (SDR) architecture and simulated the LNA for its receiver front-end. The NBS receiver LNA selects and amplifies GSM signal bursts operating at 900MHz and 1800MHz Radio Frequency Band. The later stages translate the Radio Frequency (RF) signal to Intermediate Frequency (IF) signal. This implements the SDR technology by digitizing the IF signal into bit streams that can be processed on generic Central Processing Unit (CPU) using custom written signal processing software