Mixing multi-core CPUs and GPUs for scientific simulation software

Recent technological and economic developments have led to widespread availability of multi-core CPUs and specialist accelerator processors such as graphical processing units (GPUs). The accelerated computational performance possible from these devices can be very high for some applications paradigms. Software languages and systems such as NVIDIA's CUDA and Khronos consortium's open compute language (OpenCL) support a number of individual parallel application programming paradigms. To scale up the performance of some complex systems simulations, a hybrid of multi-core CPUs for coarse-grained parallelism and very many core GPUs for data parallelism is necessary. We describe our use of hybrid applica- tions using threading approaches and multi-core CPUs to control independent GPU devices. We present speed-up data and discuss multi-threading software issues for the applications level programmer and o er some suggested areas for language development and integration between coarse-grained and ne-grained multi-thread systems. We discuss results from three common simulation algorithmic areas including: partial di erential equations; graph cluster metric calculations and random number generation. We report on programming experiences and selected performance for these algorithms on: single and multiple GPUs; multi-core CPUs; a CellBE; and using OpenCL. We discuss programmer usability issues and the outlook and trends in multi-core programming for scienti c applications developers

Micro- and sub-microstructuring and characterisation of technical surfaces by means of laser direct writing including a novel approach for laser beam profiling

Within recent years, numerous fields of engineering, like mechanics, optics and electronics, have been influenced and revolutionised by the technique of microand nano-structuring. For example, special optical elements for beam shaping, surface structures for the reduction of friction or modern "lab on chip" devices have been produced. Within this thesis a universal system has been developed facilitating the production of such structured surfaces with dimensions down to 500 nm. This system is not only capable of structuring surfaces by means of lithographic processes; it further allows the inspection of surfaces by scanning their topography. To realise such a system, two different technologies have been evaluated: Scanning Near-field Optical Lithography (SNOL), a very sophisticated technique which uses a thin fibre tip to expose a photo resist-covered surface, and confocal scanning technology. Here, the confocal scanning is accomplished using an adapted optical component, the optical pickup unit (OPU), from a gaming console, which turned out to be the most suitable and cost-efficient solution for the realisation of this system. Several test series have been carried out during this work, to verify the performance of the confocal system, both to structure photo resist surfaces and to characterise unknown surfaces. This present work will show the ability of the developed system to produce structures down to the sub-micron range and to characterise unknown surfaces with sub- micron precision. Various patterns have been written into photo resistcoated substrates to structure their surface. Beginning with diffractive optical elements (DOE) for beam shaping, followed by Dammann gratings for twodimensional beam shaping and optical gratings for light guidance as well as producing technical surfaces imitating the properties of sharkskin or simple micromechanical structures, the developed confocal system has shown itself to be flexible and widely-applicable. IV During the development of the confocal system, a strong need for a beam profiling system analysing the light beam diverging from the OPU, was recognised. Due to the fact that no commercially available system was capable of characterising beam sizes within the range of the diffraction limit, a novel method for beam profiling was invented. This method makes use of the fibre tips already applied within the SNOL system, producing tomographical scans of the beam spot

Low latency vision-based control for robotics : a thesis presented in partial fulfilment of the requirements for the degree of Master of Engineering in Mechatronics at Massey University, Manawatu, New Zealand

In this work, the problem of controlling a high-speed dynamic tracking and interception system using computer vision as the measurement unit was explored. High-speed control systems alone present many challenges, and these challenges are compounded when combined with the high volume of data processing required by computer vision systems. A semi-automated foosball table was chosen as the test-bed system because it combines all the challenges associated with a vision-based control system into a single platform. While computer vision is extremely useful and can solve many problems, it can also introduce many problems such as latency, the need for lens and spatial calibration, potentially high power consumption, and high cost. The objective of this work is to explore how to implement computer vision as the measurement unit in a high-speed controller, while minimising latencies caused by the vision itself, communication interfaces, data processing/strategy, instruction execution, and actuator control. Another objective was to implement the solution in one low-latency, low power, low cost embedded system. A field programmable gate array (FPGA) system on chip (SoC), which combines programmable digital logic with a dual core ARM processor (HPS) on the same chip, was hypothesised to be capable of running the described vision-based control system. The FPGA was used to perform streamed image pre-processing, concurrent stepper motor control and provide communication channels for user input, while the HPS performed the lens distortion mapping, intercept calculation and “strategy” control tasks, as well as controlling overall function of the system. Individual vision systems were compared for latency performance. Interception performance of the semi-automated foosball table was then tested for straight, moderate-speed shots with limited view time, and latency was artificially added to the system and the interception results for the same, centre-field shot tested with a variety of different added latencies. The FPGA based system performed the best in both steady-state latency, and novel event detection latency tests. The developed stepper motor control modules performed well in terms of speed, smoothness, resource consumption, and versatility. They are capable of constant velocity, constant acceleration and variable acceleration profiles, as well as being completely parameterisable. The interception modules on the foosball table achieved a 100% interception rate, with a confidence interval of 95%, and reliability of 98.4%. As artificial latency was added to the system, the performance dropped in terms of overall number of successful intercepts. The decrease in performance was roughly linear with a 60% in reduction in performance caused by 100 ms of added latency. Performance dropped to 0% successful intercepts when 166 ms of latency was added. The implications of this work are that FPGA SoC technology may, in future, enable computer vision to be used as a general purpose, high-speed measurement system for a wide variety of control problems

Authentication techniques in smart grid: a systematic review

Smart Grid (SG) provides enhancement to existing grids with two-way communication between the utility, sensors, and consumers, by deploying smart sensors to monitor and manage power consumption. However due to the vulnerability of SG, secure component authenticity necessitates robust authentication approaches relative to limited resource availability (i.e. in terms of memory and computational power). SG communication entails optimum efficiency of authentication approaches to avoid any extraneous burden. This systematic review analyses 27 papers on SG authentication techniques and their effectiveness in mitigating certain attacks. This provides a basis for the design and use of optimized SG authentication approaches