A High-Speed QR Decomposition Processor for Carrier-Aggregated LTE-A Downlink Systems

This paper presents a high-speed QR decomposition (QRD) processor targeting the carrier-aggregated 4 × 4 Long Term Evolution-Advanced (LTE-A) receiver. The processor provides robustness in spatially correlated channels with reduced complexity by using modifications to the Householder transform, such as decomposing-target redefinition and matrix real-valued decomposition. In terms of hardware design, we extensively explore flexibilities in systolic architectures using a high-level synthesis tool to achieve area-power efficiency. In a 65 nm CMOS technology, the processor occupies a core area of 0.77mm2 and produces 72MQRD per second, the highest reported throughput. The power consumed in the proposed processor is 219mW

Two-dimensional block transforms and their properties

Includes bibliographical references.For two-dimensional (2-D) digital filters implemented by a block recursive equation, explicit relations between their frequency characteristics and those of scalar filter are obtained. Specifically, these include the relation between the discrete-time Fourier transform (DTFT) of the block recursive equation and that of the scalar 2-D difference equation, and the relation between the block matrix transfer function of the block processor and the scalar transfer function. These relations that are independent of the type of realization of the block processor have been obtained using the eigenvalue properties of a special type of circulant matrix introduced in this correspondence

Programmable remapper with single flow architecture

The invention relates to image processing systems and methods and in particular to a machine which accepts a real time video image in the form of a matrix of picture elements (pixels) and remaps such image according to a selectable one of a plurality of mapping functions to create an output matrix of pixels. Such mapping functions, or transformations, may be any one of a number of different transformations depending on the objective of the user of the system. The system remaps input images from one coordinate system to another using a set of look-up tables for the data necessary for the transform. The transforms, which are operator selectable, are precomputed and loaded into massive look-up tables. Input pixels, via the look-up tables of any particular transform selected, are mapped into output pixels with the radiance information of the input pixels being appropriately weighted. An earlier embodiment of the system included two parallel processors: a collective processor which mapped multiple input pixels into a single output pixel and an interpolative processor. The interpolative processor performed an interpolation among pixels in the input image where a given input pixel may affect the value of many output pixels. Several advantages are provided over previous embodiments in that the two distinct processors are replaced by a single processor capable of performing both types of operations (collective and interpolative) with no more complexity. Previously, there has existed no image processor or 'remapper' that can operate with sufficient speed and flexibility to permit investigating different transformation patterns in real time

Enhanced monopulse radar tracking using optimum fractional Fourier transform

Conventional monopulse radar processors are used to track a target that appears in the look direction beam width. The distortion produced when additional targets appear in the look direction beam width can cause severe erroneous outcomes from the monopulse processor. This leads to errors in the target tracking angles that may cause target mistracking. A new signal processing algorithm is presented in this paper which offers a solution to this problem. The technique is based on the use of optimal Fractional Fourier Transform (FrFT) filtering. The relative performance of the new filtering method over traditional based methods is assessed using standard deviation angle estimation error (STDAE) for a range of simulated environments. The proposed system configuration succeeds in significantly cancelling additional target signals appearing in the look direction beam width even if these targets have the same Doppler frequency

Programmable remapper for image processing

A video-rate coordinate remapper includes a memory for storing a plurality of transformations on look-up tables for remapping input images from one coordinate system to another. Such transformations are operator selectable. The remapper includes a collective processor by which certain input pixels of an input image are transformed to a portion of the output image in a many-to-one relationship. The remapper includes an interpolative processor by which the remaining input pixels of the input image are transformed to another portion of the output image in a one-to-many relationship. The invention includes certain specific transforms for creating output images useful for certain defects of visually impaired people. The invention also includes means for shifting input pixels and means for scrolling the output matrix

Real-time portable system for fabric defect detection using an ARM processor

Modern textile industry seeks to produce textiles as little defective as possible since the presence of defects can decrease the final price of products from 45% to 65%. Automated visual inspection (AVI) systems, based on image analysis, have become an important alternative for replacing traditional inspections methods that involve human tasks. An AVI system gives the advantage of repeatability when implemented within defined constrains, offering more objective and reliable results for particular tasks than human inspection. Costs of automated inspection systems development can be reduced using modular solutions with embedded systems, in which an important advantage is the low energy consumption. Among the possibilities for developing embedded systems, the ARM processor has been explored for acquisition, monitoring and simple signal processing tasks. In a recent approach we have explored the use of the ARM processor for defects detection by implementing the wavelet transform. However, the computation speed of the preprocessing was not yet sufficient for real time applications. In this approach we significantly improve the preprocessing speed of the algorithm, by optimizing matrix operations, such that it is adequate for a real time application. The system was tested for defect detection using different defect types. The paper is focused in giving a detailed description of the basis of the algorithm implementation, such that other algorithms may use of the ARM operations for fast implementations

Fabric defect detection using the wavelet transform in an ARM processor

Small devices used in our day life are constructed with powerful architectures that can be used for industrial applications when requiring portability and communication facilities. We present in this paper an example of the use of an embedded system, the Zeus epic 520 single board computer, for defect detection in textiles using image processing. We implement the Haar wavelet transform using the embedded visual C++ 4.0 compiler for Windows CE 5. The algorithm was tested for defect detection using images of fabrics with five types of defects. An average of 95% in terms of correct defect detection was obtained, achieving a similar performance than using processors with float point arithmetic calculations

A new fractional Fourier transform based monopulse tracking radar processor

Conventional monopulse radar processors are used to track a target that appears in the look direction beam width. The distortion produced when additional targets appear in the look direction beam width can cause severe erroneous outcomes from the monopulse processor. This leads to errors in the target tracking angles that may cause the target tracker to fail. A new signal processing algorithm is presented in this paper that is based on the use of optimal Fractional Fourier Transform (FrFT) filtering to solve this problem. The relative performance of the new filtering method over traditional based methods is assessed using standard deviation angle estimation error (STDAE) for a range of simulated environments. The proposed system configurations with the optimum FrFT filters succeeds in effectively cancelling additional target signals appearing in the look direction beam width