9 research outputs found
Global Arrays over SCI : Enveis kommunikasjon i clustere
Sammendrag av hovedfagsoppgaven "Global Arrays over SCI - Enveis
kommunikasjon i clustere" av Kai-Robert BjĂžrnstad
Enkelte applikasjonstyper og algoritmer vanskelig Ă„
implementere over MPI-grensesnittet. MPI-standarden
fordrer en tosidig kommunikasjonsmodell hvor bÄde
sender og mottaker eksplisitt mÄ delta i
kommunikasjonen. Enveis kommunikasjon baserer seg pÄ
deltakelse kun fra senderprosessen ved utveksling av
data (typisk kommunikasjonsmetode for SMP maskiner).
Algoritmer og grensesnitt (f.eks. SHMEM) er utviklet
for maskiner hvor prosessorene har et delt adresserom.
Hovedforskjellen pÄ enveis og tosidig kommunikasjon
ligger i hvilken programmeringsmodell som tilbys, mao.
hvordan applikasjonsprogrammereren mÄ forholde seg til
kommunikasjon mellom prosesser.
Clustere har i utgangspunktet ikke et delt adresserom,
noe som skaper problemer ved envis kommunikasjon. Som
et resultat har man pÄ mange mÄter forsÞkt Ä skape en
illusjon av shared memory ved hjelp av bÄde hardware
og/eller programvare, et sÄkalt DSM (Distributed Shared
Memory). I denne sammenheng har et bibliotek kalt
Global Arrays (GA) blitt utviklet. GA er implementert
over kommunikasjonsbiblioteket ARMCI (Aggregate Remote
Memory Copy Interface).
ARMCI er et portabelt kommunikasjonsbibliotek med fokus
pÄ implementasjon av effektive enveis
kommunikasjonsoperasjoner i clustere og i shared
memory-maskiner. Grensesnittet er ikke standardisert,
men benyttes likefullt av flere applikasjoner, f.eks.
NWCHEM og GAMESS-UK (gjennom GA). ARMCI likner pÄ mange
mÄter SHMEM-grensesnittet for enveis kommunikasjon.
Forskjellen ligger i at ARMCI fokuserer pÄ overfÞring
av ikke-sekvensielle (strided) datastrukturer.
En viktig del av datakommunikasjon er Ä gjÞre denne sÄ
effektiv som mulig. Det fokuseres pÄ Ä benytte minst
mulig tid pÄ kommunikasjon (overhead) og mest mulig pÄ
prosessering/regning. Med dette som utganspunkt
undersĂžkes det i oppgaven mulighetene for Ă„ la ARMCI
kunne kommunisere over hĂžyhastighetsnettverket SCI. Som
et utgangspunkt skisserer oppgaven tre hovedmetoder for
implementasjon; ARMCI over SCI via TCP/IP, MPI og
SCI-driver. Prosjektet er basert pÄ Scali AS sin
programvare pakke (med ScaFun og ScaMPI) SSP (Scali
Software Package).
Det har blir vist at bruk av TCP/IP-implementasjoner
som ScaIP over SCI introduserer en hĂžy overhead og gir
dÄrligere ytelse enn allerede eksisterende
ARMCI-implementasjoner over Gigabit Ethernet. Det er
videre utviklet en ARMCI-implementasjon utelukkende
over en tosidig meldingsutvekslingsstandard, MPI. Denne
kan benyttes over SCI ved hjelp av MPI-implementasjonen
ScaMPI.
ARMCI har ogsÄ blitt implementert direkte over SCI ved
hjelp av ScaFun. Denne implementasjonen ser ut til Ă„ ha
stÞrst potensiale nÄr det kommer til selve
datakommunikasjonen og bruk av zero- eller one-copy
protokoller. Likefullt er faller implementasjonen i
denne oppgaven pÄ den hÞye overheaden forbundet med
SCI-interrupter. Ved bruk av Hyper-Threading-teknologi
fra Intel og en nĂždvendig thread-safe
MPI-implementasjon, blir det vist en minimal
introduksjon av overhead gjennom bruk av MPI og
samtidig hĂžy portabilitet
High Performance Transaction Processing on Non-Uniform Hardware Topologies
Transaction processing is a mission critical enterprise application that runs on high-end servers. Traditionally, transaction processing systems have been designed for uniform core-to-core communication latencies. In the past decade, with the emergence of multisocket multicores, for the first time we have Islands, i.e., groups of cores that communicate fast among themselves and slower with other groups. In current mainstream servers, each multicore processor corresponds to an Island. As the number of cores on a chip increases, however, we expect that multiple Islands will form within a single processor in the nearby future. In addition, the access latencies to the local memory and to the memory of another server over fast interconnect are converging, thus creating a hierarchy of Islands within a group of servers. Non-uniform hardware topologies pose a significant challenge to the scalability and the predictability of performance of transaction processing systems. Distributed transaction processing systems can alleviate this problem; however, no single deployment configuration is optimal for all workloads and hardware topologies. In order to fully utilize the available processing power, a transaction processing system needs to adapt to the underlying hardware topology and tune its configuration to the current workload. More specifically, the system should be able to detect any changes to the workload and hardware topology, and adapt accordingly without disrupting the processing. In this thesis, we first systematically quantify the impact of hardware Islands on deployment configurations of distributed transaction processing systems. We show that none of these configurations is optimal for all workloads, and the choice of the optimal configuration depends on the combination of the workload and hardware topology. In the cluster setting, on the other hand, the choice of optimal configuration additionally depends on the properties of the communication channel between the servers. We address this challenge by designing a dynamic shared-everything system that adapts its data structures automatically to hardware Islands. To ensure good performance in the presence of shifting workload patterns, we use a lightweight partitioning and placement mechanism to balance the load and minimize the synchronization overheads across Islands. Overall, we show that masking the non-uniformity of inter-core communication is critical for achieving predictably high performance for latency-sensitive applications, such as transaction processing. With clusters of a handful of multicore chips with large main memories replacing high-end many-socket servers, the deployment rules of thumb identified in our analysis have a potential to significantly reduce the synchronization and communication costs of transaction processing. As workloads become more dynamic and diverse, while still running on partitioned infrastructure, the lightweight monitoring and adaptive repartitioning mechanisms proposed in this thesis will be applicable to a wide range of designs for which traditional offline schemes are impractical
Comparative Analysis of Student Learning: Technical, Methodological and Result Assessing of PISA-OECD and INVALSI-Italian Systems .
PISA is the most extensive international survey promoted by the OECD in the field of education, which measures the skills of fifteen-year-old students from more than 80 participating countries every three years. INVALSI are written tests carried out every year by all Italian students in some key moments of the school cycle, to evaluate the levels of some fundamental skills in Italian, Mathematics and English. Our comparison is made up to 2018, the last year of the PISA-OECD survey, even if INVALSI was carried out for the last edition in 2022. Our analysis focuses attention on the common part of the reference populations, which are the 15-year-old students of the 2nd class of secondary schools of II degree, where both
sources give a similar picture of the students
ECOS 2012
The 8-volume set contains the Proceedings of the 25th ECOS 2012 International Conference, Perugia, Italy, June 26th to June 29th, 2012. ECOS is an acronym for Efficiency, Cost, Optimization and Simulation (of energy conversion systems and processes), summarizing the topics covered in ECOS: Thermodynamics, Heat and Mass Transfer, Exergy and Second Law Analysis, Process Integration and Heat Exchanger Networks, Fluid Dynamics and Power Plant Components, Fuel Cells, Simulation of Energy Conversion Systems, Renewable Energies, Thermo-Economic Analysis and Optimisation, Combustion, Chemical Reactors, Carbon Capture and Sequestration, Building/Urban/Complex Energy Systems, Water Desalination and Use of Water Resources, Energy Systems- Environmental and Sustainability Issues, System Operation/ Control/Diagnosis and Prognosis, Industrial Ecology
Bowdoin Orient v.90, no.1-22 (1960-1961)
https://digitalcommons.bowdoin.edu/bowdoinorient-1960s/1001/thumbnail.jp