Internationalisation of Innovation: Why Chip Design Moving to Asia

This paper will appear in International Journal of Innovation Management, special issue in honor of Keith Pavitt, (Peter Augsdoerfer, Jonathan Sapsed, and James Utterback, guest editors), forthcoming. Among Keith Pavitt's many contributions to the study of innovation is the proposition that physical proximity is advantageous for innovative activities that involve highly complex technological knowledge But chip design, a process that creates the greatest value in the electronics industry and that requires highly complex knowledge, is experiencing a massive dispersion to leading Asian electronics exporting countries. To explain why chip design is moving to Asia, the paper draws on interviews with 60 companies and 15 research institutions that are doing leading-edge chip design in Asia. I demonstrate that "pull" and "policy" factors explain what attracts design to particular locations. But to get to the root causes that shift the balance in favor of geographical decentralization, I examine "push" factors, i.e. changes in design methodology ("system-on-chip design") and organization ("vertical specialization" within global design networks). The resultant increase in knowledge mobility explains why chip design - that, in Pavitt's framework is not supposed to move - is moving from the traditional centers to a few new specialized design clusters in Asia. A completely revised and updated version has been published as: " Complexity and Internationalisation of Innovation: Why is Chip Design Moving to Asia?," in International Journal of Innovation Management, special issue in honour of Keith Pavitt, Vol. 9,1: 47-73.

Geographical interdependence, international trade and economic dynamics: the Chinese and German solar energy industries

The trajectories of the German and Chinese photovoltaic industries differ significantly yet are strongly interdependent. Germany has seen a rapid growth in market demand and a strong increase in production, especially in the less developed eastern half of the country. Chinese growth has been export driven. These contrasting trajectories reflect the roles of market creation, investment and credit and the drivers of innovation and competitiveness. Consequent differences in competiveness have generated major trade disputes

A Distributed-Ledger, Edge-Computing Architecture for Automation and Computer Integration in Semiconductor Manufacturing

Contemporary 300mm semiconductor manufacturing systems have highly automated and digitalized cyber-physical integration. They suffer from the profound problems of integrating large, centralized legacy systems with small islands of automation. With the recent advances in disruptive technologies, semiconductor manufacturing has faced dramatic pressures to reengineer its automation and computer integrated systems. This paper proposes a Distributed- Ledger, Edge-Computing Architecture (DLECA) for automation and computer integration in semiconductor manufacturing. Based on distributed ledger and edge computing technologies, DLECA establishes a decentralized software framework where manufacturing data are stored in distributed ledgers and processed locally by executing smart contracts at the edge nodes. We adopt an important topic of automation and computer integration for semiconductor research & development (R&D) operations as the study vehicle to illustrate the operational structure and functionality, applications, and feasibility of the proposed DLECA software framewor

Technology Roadmapping for Commercializing Strategic Innovations

In the increasingly globalized world economies, a variety of drivers define the market and regulatory contexts for commercializing the strategic innovations that provide significant competitive advantage in the near-term and long-term future. In this study we examine how technological roadmapping integrates these strategic contextual factors with the organizational capabilities and resources of the firm to commercialize strategic innovations. This is done by first examining four roadmapping case-studies: (1) at Motorola, (2) at Sandia National laboratories, (3) the National and International Roadmaps for Semiconductors, and (3) nanotechnologies. A five stage process is proposed for commercializing strategic innovations. Finally, managerial implications and potential future research are discussed.En las crecientes economías del mundo globalizado, una variedad de factores definen al mercado y el contexto regulatorio para la comercialización de innovaciones estratégicas que proveen ventajas competitivas significantes a corto y largo plazo. En éste estudio se examinan como la generación de mapas tecnológicos integran estos factores contextuales con las capacidades organizacionales y los recursos de la compañía para comercializar las innovaciones estratégicas. El estudio se realizó examinando 4 casos de mapas tecnológicos: (1) Motorota, (2) Laboratorios Nacionales Sandia, (3) Los mapas Internacionales para Semiconductores y (4) Nanotecnologías. Un procedimiento consistente en 5 etapas es propuesto para la comercialización de innovaciones estratégicas. Finalmente se discuten, las implicaciones de gestión y el desarrollo de un futuro tema de investigación.In the increasingly globalized world economies, a variety of drivers define the market and regulatory contexts for commercializing the strategic innovations that provide significant competitive advantage in the near-term and long-term future. In this study we examine how technological roadmapping integrates these strategic contextual factors with the organizational capabilities and resources of the firm to commercialize strategic innovations. This is done by first examining four roadmapping case-studies: (1) at Motorola, (2) at Sandia National laboratories, (3) the National and International Roadmaps for Semiconductors, and (3) nanotechnologies. A five stage process is proposed for commercializing strategic innovations. Finally, managerial implications and potential future research are discussed

Roadmap on Biological Pathways for Electronic Nanofabrication and Materials

Conventional microchip fabrication is energy and resource intensive. Thus, the discovery of new manufacturing approaches that reduce these expenditures would be highly beneficial to the semiconductor industry. In comparison, living systems construct complex nanometer-scale structures with high yields and low energy utilization. Combining the capabilities of living systems with synthetic DNA-/protein-based self-assembly may offer intriguing potential for revolutionizing the synthesis of complex sub-10 nm information processing architectures. The successful discovery of new biologically based paradigms would not only help extend the current semiconductor technology roadmap, but also offer additional potential growth areas in biology, medicine, agriculture and sustainability for the semiconductor industry. This article summarizes discussions surrounding key emerging technologies explored at the Workshop on Biological Pathways for Electronic Nanofabrication and Materials that was held on 16–17 November 2016 at the IBM Almaden Research Center in San Jose, CA

JTEC Panel report on electronic manufacturing and packaging in Japan

This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies

US Microelectronics Packaging Ecosystem: Challenges and Opportunities

The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technological solutions to enhance cost-effectiveness while incorporating more features into the silicon footprint. One promising approach is Heterogeneous Integration (HI), which involves advanced packaging techniques to integrate independently designed and manufactured components using the most suitable process technology. However, adopting HI introduces design and security challenges. To enable HI, research and development of advanced packaging is crucial. The existing research raises the possible security threats in the advanced packaging supply chain, as most of the Outsourced Semiconductor Assembly and Test (OSAT) facilities/vendors are offshore. To deal with the increasing demand for semiconductors and to ensure a secure semiconductor supply chain, there are sizable efforts from the United States (US) government to bring semiconductor fabrication facilities onshore. However, the US-based advanced packaging capabilities must also be ramped up to fully realize the vision of establishing a secure, efficient, resilient semiconductor supply chain. Our effort was motivated to identify the possible bottlenecks and weak links in the advanced packaging supply chain based in the US.Comment: 22 pages, 8 figure