FMCW rail-mounted SAR: Porting spotlight SAR imaging from MATLAB to FPGA

In this work, a low-cost laptop-based radar platform derived from the MIT open courseware has been implemented. It can perform ranging, Doppler measurement and SAR imaging using MATLAB as the processor. In this work, porting the signal processing algorithms onto a FPGA platform will be addressed as well as differences between results obtained using MATLAB and those obtained using the FPGA platform. The target FPGA platforms were a Virtex6 DSP kit and Spartan3A starter kit, the latter was also low-cost to further reduce the cost for students to access radar technology

Porting Spotlight Range Migration Algorithm Processor from Matlab to Virtex 6

This paper describes the implementation and optimization of a Synthetic Aperture Radar process Spotlight Range Migration Algorithm processor on FPGA Virtex 6 DSP kit that fits on the chip. The mean/max error compared to a software implementation is -54/-28.74dB for 55 elements and 882 samples

A review of synthetic-aperture radar image formation algorithms and implementations: a computational perspective

Designing synthetic-aperture radar image formation systems can be challenging due to the numerous options of algorithms and devices that can be used. There are many SAR image formation algorithms, such as backprojection, matched-filter, polar format, Range–Doppler and chirp scaling algorithms. Each algorithm presents its own advantages and disadvantages considering efficiency and image quality; thus, we aim to introduce some of the most common SAR image formation algorithms and compare them based on these two aspects. Depending on the requisites of each individual system and implementation, there are many device options to choose from, for in stance, FPGAs, GPUs, CPUs, many-core CPUs, and microcontrollers. We present a review of the state of the art of SAR imaging systems implementations. We also compare such implementations in terms of power consumption, execution time, and image quality for the different algorithms used.info:eu-repo/semantics/publishedVersio

Onboard processing of synthetic aperture radar backprojection algorithm in FPGA

Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-onchip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes 512 x 512 and 1024 x 1024 in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is 2.6x faster and consumes 13x less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.info:eu-repo/semantics/publishedVersio

A Real-time SAR Echo Simulator Based on FPGA and Parallel Computing

This paper designs and implements a SAR (Synthetic Aperture Radar) real-time echo simulator based on multi-FPGA parallel computing. The one-dimensional frequency-domain Fourier transform algorithm is used in the simulator, and the echo signal model and the rapid calculation algorithm of impulse response function are introduced. The pipeline compute structure, multichannel parallel computing and procedure flow design are the key technologies of the simulator, which are also presented in details. And finally, the validity and correctness of the SAR echo simulator are verified through the imaging results of the point-array target and the nature scene target

A case implementation of a spotlight range migration algorithm on FPGA platform

2014 International Symposium on Antennas and Propagation, ISAP 2014, Taiwan, 2-5 December 2014This paper presents a real-time implementation of a spotlight range migration algorithm processor on FPGA platform for the MIT open courseware radar. The modified radar platform is presented. The paper also describes the use of FPGA resources on a Virtex-6 DSP kit board, and compares the results obtained with the hardware implementation and the Matlab equivalent. A good match between the real-time and the offline processing of data was found.Department of Electronic and Information Engineerin

Optimized Minimum-Search for SAR Backprojection Autofocus on GPUs Using CUDA

Autofocus techniques for synthetic aperture radar (SAR) can improve the image quality substantially. Their high computational complexity imposes a challenge when employing them in runtime-critical implementations. This paper presents an autofocus implementation for stripmap SAR specially optimized for parallel architectures like GPUs. Thorough evaluation using real SAR data shows that the tunable parameters of the algorithm allow to counterbalance runtime and achieved image quality.© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works

Implementation and Performance of Factorized Backprojection on Low-cost Commercial-Off-The-Shelf Hardware

Traditional Synthetic Aperture Radar (SAR) systems are large, complex, and expensive platforms that require significant resources to operate. The size and cost of the platforms limits the potential uses of SAR to strategic level intelligence gathering or large budget research efforts. The purpose of this thesis is to implement the factorized backprojection SAR image processing algorithm in the C++ programming language and test the code\u27s performance on a low cost, low size, weight, and power (SWAP) computer: a Raspberry Pi Model B. For a comparison of performance, a baseline implementation of filtered backprojection is adapted to C++ from pre-existing MATLAB® code. The factorized backprojection algorithm shows a computational improvement factor of 2-3 compared to filtered backprojection. Execution on a single Raspberry Pi is too slow for real-time imaging. However, factorized backprojection is easily parallelized, and we include a discussion of parallel implementation across multiple Pis