53,460 research outputs found

    Bioresorbable silicon electronics for transient spatiotemporal mapping of electrical activity from the cerebral cortex.

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    Bioresorbable silicon electronics technology offers unprecedented opportunities to deploy advanced implantable monitoring systems that eliminate risks, cost and discomfort associated with surgical extraction. Applications include postoperative monitoring and transient physiologic recording after percutaneous or minimally invasive placement of vascular, cardiac, orthopaedic, neural or other devices. We present an embodiment of these materials in both passive and actively addressed arrays of bioresorbable silicon electrodes with multiplexing capabilities, which record in vivo electrophysiological signals from the cortical surface and the subgaleal space. The devices detect normal physiologic and epileptiform activity, both in acute and chronic recordings. Comparative studies show sensor performance comparable to standard clinical systems and reduced tissue reactivity relative to conventional clinical electrocorticography (ECoG) electrodes. This technology offers general applicability in neural interfaces, with additional potential utility in treatment of disorders where transient monitoring and modulation of physiologic function, implant integrity and tissue recovery or regeneration are required

    Expansion of CMOS array design techniques

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    The important features of the multiport (double entry) automatic placement and routing programs for standard cells are described. Measured performance and predicted performance were compared for seven CMOS/SOS array types and hybrids designed with the high speed CMOS/SOS cell family. The CMOS/SOS standard cell data sheets are listed and described

    Desynchronization: Synthesis of asynchronous circuits from synchronous specifications

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    Asynchronous implementation techniques, which measure logic delays at run time and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst-case delays at design time, and constrain the clock cycle accordingly. De-synchronization is a new paradigm to automate the design of asynchronous circuits from synchronous specifications, thus permitting widespread adoption of asynchronicity, without requiring special design skills or tools. In this paper, we first of all study different protocols for de-synchronization and formally prove their correctness, using techniques originally developed for distributed deployment of synchronous language specifications. We also provide a taxonomy of existing protocols for asynchronous latch controllers, covering in particular the four-phase handshake protocols devised in the literature for micro-pipelines. We then propose a new controller which exhibits provably maximal concurrency, and analyze the performance of desynchronized circuits with respect to the original synchronous optimized implementation. We finally prove the feasibility and effectiveness of our approach, by showing its application to a set of real designs, including a complete implementation of the DLX microprocessor architectur

    Alternative Computational Protocols for Supercharging Protein Surfaces for Reversible Unfolding and Retention of Stability

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    Bryan S. Der, Ron Jacak, Brian Kuhlman, Department of Biochemistry and Biophysics, University of North Carolina at Chapel Hill, Chapel Hill, North Carolina, United States of AmericaChristien Kluwe, Aleksandr E. Miklos, Andrew D. Ellington , Center for Systems and Synthetic Biology, University of Texas at Austin, Austin, Texas, United States of AmericaChristien Kluwe, Aleksandr E. Miklos, George Georgiou, Andrew D. Ellington, Institute for Cellular and Molecular Biology, University of Texas at Austin, Austin, Texas, United States of AmericaAleksandr E. Miklos, Andrew D. Ellington , Applied Research Laboratories, University of Texas at Austin, Austin, Texas, United States of AmericaSergey Lyskov, Jeffrey J. Gray, Department of Chemical and Biomolecular Engineering, Johns Hopkins University, Baltimore, Maryland, United States of AmericaBrian Kuhlman, Lineberger Comprehensive Cancer Center, University of North Carolina at Chapel Hill, Chapel Hill, North Carolina, United States of AmericaReengineering protein surfaces to exhibit high net charge, referred to as “supercharging”, can improve reversibility of unfolding by preventing aggregation of partially unfolded states. Incorporation of charged side chains should be optimized while considering structural and energetic consequences, as numerous mutations and accumulation of like-charges can also destabilize the native state. A previously demonstrated approach deterministically mutates flexible polar residues (amino acids DERKNQ) with the fewest average neighboring atoms per side chain atom (AvNAPSA). Our approach uses Rosetta-based energy calculations to choose the surface mutations. Both protocols are available for use through the ROSIE web server. The automated Rosetta and AvNAPSA approaches for supercharging choose dissimilar mutations, raising an interesting division in surface charging strategy. Rosetta-supercharged variants of GFP (RscG) ranging from −11 to −61 and +7 to +58 were experimentally tested, and for comparison, we re-tested the previously developed AvNAPSA-supercharged variants of GFP (AscG) with +36 and −30 net charge. Mid-charge variants demonstrated ~3-fold improvement in refolding with retention of stability. However, as we pushed to higher net charges, expression and soluble yield decreased, indicating that net charge or mutational load may be limiting factors. Interestingly, the two different approaches resulted in GFP variants with similar refolding properties. Our results show that there are multiple sets of residues that can be mutated to successfully supercharge a protein, and combining alternative supercharge protocols with experimental testing can be an effective approach for charge-based improvement to refolding.This work was supported by the Defense Advanced Research Projects Agency (HR-0011-10-1-0052 to A.E.) and the Welch Foundation (F-1654 to A.E.), the National Institutes of Health grants GM073960 (B.K.) and R01-GM073151 (J.G. and S.L.), the Rosetta Commons (S.L.), the National Science Foundation graduate research fellowship (2009070950 to B.D.), the UNC Royster Society Pogue fellowship (B.D.), and National Institutes of Health grant T32GM008570 for the UNC Program in Molecular and Cellular Biophysics. The funders had no role in study design, data collection and analysis, decision to publish, or preparation of the manuscript.Center for Systems and Synthetic BiologyCellular and Molecular BiologyApplied Research LaboratoriesEmail: [email protected]

    Nanowire Volatile RAM as an Alternative to SRAM

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    Maintaining benefits of CMOS technology scaling is becoming challenging due to increased manufacturing complexities and unwanted passive power dissipations. This is particularly challenging in SRAM, where manufacturing precision and leakage power control are critical issues. To alleviate some of these challenges a novel non-volatile memory alternative to SRAM was proposed called nanowire volatile RAM (NWRAM). Due to NWRAMs regular grid based layout and innovative circuit style, manufacturing complexity is reduced and at the same time considerable benefits are attained in terms of performance and leakage power reduction. In this paper, we elaborate more on NWRAM circuit aspects and manufacturability, and quantify benefits at 16nm technology node through simulation against state-of-the-art 6T-SRAM and gridded 8T-SRAM designs. Our results show the 10T-NWRAM to be 2x faster and 35x better in terms of leakage when compared to high performance gridded 8T-SRAM design

    Fast on-wafer electrical, mechanical, and electromechanical characterization of piezoresistive cantilever force sensors

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    Validation of a technological process requires an intensive characterization of the performance of the resulting devices, circuits, or systems. The technology for the fabrication of micro and nanoelectromechanical systems (MEMS and NEMS) is evolving rapidly, with new kind of device concepts for applications like sensing or harvesting are being proposed and demonstrated. However, the characterization tools and methods for these new devices are still not fully developed. Here, we present an on-wafer, highly precise, and rapid characterization method to measure the mechanical, electrical, and electromechanical properties of piezoresistive cantilevers. The setup is based on a combination of probe-card and atomic force microscopy technology, it allows accessing many devices across a wafer and it can be applied to a broad range of MEMS and NEMS. Using this setup we have characterized the performance of multiple submicron thick piezoresistive cantilever force sensors. For the best design we have obtained a force sensitivity ℜ_F = 158μV/nN, a noise of 5.8 μV (1 Hz–1 kHz) and a minimum detectable force of 37 pN with a relative standard deviation of σ_r ≈ 8%. This small value of σr, together with a high fabrication yield >95%, validates our fabrication technology. These devices are intended to be used as bio-molecular detectors for the measurement of intermolecular forces between ligand and receptor molecule pairs
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