Contributions on spectral control for the asymmetrical full bridge multilevel inverter

Las topologías de circuitos inversores multinivel pueden trabajar a tensiones y potencias mayores que las alcanzadas por convertidores convencionales de dos niveles. Además, la conversión multinivel reduce la distorsión armónica de las variables de salida y en algunos casos, a pesar del aumento de elementos de conmutación, también reduce las pérdidas de conversión al incrementarse el número de niveles. La reducción de distorsión alcanzada por el número de niveles puede aprovecharse para reducir las pérdidas de conmutación disminuyendo la frecuencia de las señales portadoras. Para reducir aún más esta frecuencia sin degradar el espectro, nosotros controlamos las pendientes de las portadoras triangulares. Primero se han desarrollado dos modelos analíticos para predecir el espectro del voltage de salida, dependiendo de: el índice de modulación MA, la razón de distribución de voltaje K de las fuentes de alimentación , y las cuatro pendientes de las portadoras{r1, r2, r3, r4}. El primer modelo considera el Muestreo Natural y se basa en Series Dobles de Fourier (SDF) mientras que el segundo modelo, utiliza la Serie Sencilla de Fourier (SSF) introduciendo el concepto de Muestreo Pseudo-Natural, una aproximación digital de la modulación natural. Ambos modelos son programados en Matlab, verificados con Pspice y validados con un prototipo experimental que contiene un modulador digital implementado con DSP.La concordancia entre las modulaciones natural y pseudo-natural, asi como entre sus respectivos modelos, es aprovechada por un algorítmo genético (AG) donde la THD es la función costo a reducir. Después de varios ensayos y de sintonizar el AG, se genera una matriz que contiene conjuntos de portadoras optimizadas dentro un rango específico de las variables {MA,K} y es probada con un segundo prototipo en lazo cerrado. Un lazo lento digital modifica las portadoras creadas por un dsPIC en modulaciones PWM; estas son demoduladas y sus amplitudes corregidas por un lazo de acción anticipada. Estas portadoras se comparan con una referencia sinusoidal que a su vez es modificada por variables de estado, generando finalmente la modulación multinivel en lazo cerrado. Los resultados finales demuestran la fiabilidad de la reducción de armónicos usando la programación de las pendientes de las portadoras. Palabras claves: inversor multinivel, PWM, distorsión armónica, modelo espectral, pendiente de portadora, conjunto de portadoras, distribución de niveles, Serie Doble de Fourier, Serie Simple de Fourier, muestreo natural, muestreo regular, muestreo pseudo-natural , Algoritmos Genéticos.Multilevel inverter (MI) topologies can work at higher voltage and higher power than conventional two-level converters. In addition, multilevel conversion reduces the output variables harmonic distortion and, sometimes, in spite of the devices-count increment, the conversion losses can also decrease by increasing the number of levels. The harmonic distortion reduction achieved by increasing the number of levels, can be used to further reducing the switching losses by decreasing the inverter carrier frequencies. To reduce even more the switching frequency without degrading output spectrum, we control the triangular carrier waveforms slopes. First, to achieve this target, two analytical models have been created in order to predict the inverter output voltage spectrum, depending on diverse parameters: the amplitude modulation index MA, the voltage distribution K of the inverter input sources, and the four carrier slopes {r1, r2, r3, r4}. The first model considers Natural Sampling and is based on Double Fourier Series (DFS) whereas the second model based on Simple Fourier Series (SFS), introduces the concept of Pseudo-Natural Sampling, as a digital approximation of the natural modulation. Both models are programmed in Matlab, verified with Pspice simulations and validated with a first experimental prototype with a DSP digital modulator.The good agreement between natural and pseudo-natural modulations, as well as their respective DFS and SFS models, is exploited by a Genetic Algorithm (GA) application where THD is the cost function to minimize. After testing and properly tuning the GA, a framework matrix containing the optimized carriers set for a specific range of variables {MA,K} is generated and then, tested with a second, closed-loop prototype. A slow digital loop modifies the carrier slopes created by dsPIC microcontroller as PWM modulations, whose amplitude, once demodulated, are affected by a feed-forward loop. These carriers, compared with a sinusoidal reference, state-feedback modified, generate finally the closed-loop multilevel modulation. The final results demonstrates the feasibility of harmonic reduction by means of carrier slopes programming. Keywords: multilevel inverter, PWM, harmonic distortion, spectral modeling, carrier slope, carriers set, level distribution, Double Fourier Series, Simple Fourier Series, natural sampling, regular sampling, pseudo-natural sampling, Genetic Algorithms

Design of a 2.4 Ghz BAW-Based CMOS Transmitter

In recent years, bulk acoustic wave resonators (BAW) in combination with RF circuits have shown a big potential in achieving the low-power consumption and miniaturization level required to address wireless sensor nodes (WSN) applications. A lot of work has been focused on the receiver side, by integrating BAW resonators with low noise amplifiers (LNA) and in frequency synthesis with the design of BAW-based local oscillators, most of them working at fixed frequency due to their limited tuning range. At the architectural level, this has forced the implementation of several single channel transceivers. This thesis aims at exploring the use of BAW resonators in the transmitter, proposing an architecture capable of taking full advantage of them. The main objective is to develop a transmitter for WSN multi-channel applications able to cover the whole 2.4 GHz ISM band and enable the compatibility with wide-spread standards like Bluetooth and Bluetooth Low Energy. Typical transmissions should thus range from low data rates (typically tens of kb/s) to medium data rates (1 Mb/s), with FSK and GFSK modulation schemes, should be centered on any of the channels provided by these standards and cover a maximum transmission range of some tens of meters. To achieve these targets and circumvent the limited tuning range of the BAW oscillator, an up-conversion transmitter using wide IF is used. The typical spurs problems related to this transmitter architecture are addressed by using a combined suppression based on SSB mixing and selective amplification. The latter is achieved by cointegration of a high efficiency power amplifier with BAW resonators, which allows performing spurs filtering while preserving the efficiency. In particular the selective amplifier is designed by including in the PA analysis the BAW resonator parameters, which allows integrating the BAW filter into the passive network loading the amplifier, participating in the drain voltage shaping. Finally, the frequency synthesis section uses a fractional division plus LC PLL filtering and further integer division to generate the IF signals and exploit the very-low BAW oscillator phase noise. The transmitter has been integrated in a 0.18 µm standard digital CMOS technology. It allows addressing the whole 80 MHz wide 2.4 GHz ISM band. The unmodulated RF frequency carrier demonstrates a very-low phase noise of –136 dBc/Hz at 1 MHz offset. The IF spurs are maintained lower than –48 dBc, satisfying the international regulations for output power up to 10 dBm without the use of any quadrature error compensation in the transmitter. This is achieved thanks to the rejection provided by the SSB mixer and the selective amplifier, which can reach drain efficiency of up to 24% with integrated inductances, including the insertion losses of the BAW filter. The transmitter consumes 35.3 mA at the maximum power of 5.4 dBm under 1.6 V (1.2 V for the PA), while transmitting a 1 Mb/s GFSK signal and complying with both Bluetooth and Bluetooth Low Energy relative and absolute spectrum requirements

Design and Linearization of Energy Efficiency Power Amplifier in Nonlinear OFDM Transmitter for LTE-5G Applications. Simulation and measurements of energy efficiency power amplifier in the presence of nonlinear OFDM transmitter system and digital predistortion based on Hammerstein-Wiener method

This research work has made an effort to understand a novel line of radio frequency power amplifiers (RFPAs) that address initiatives for efficiency enhancement and linearity compensation to harmonize the fifth generation (5G) campaign. The objective is to enhance the performance of an orthogonal frequency division multiplexing-long term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the RFPA. The first part of this work explores the design and implementation of 15.5 W class AB RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement and redeeming exhibition of excessive power in the transmitter. Consequently, this work goes beyond improving efficiency over a linear RF power amplifier design; in which a comprehensive investigation on the fundamental and harmonic components of class F RF power amplifier using a load-pull approach to realise an optimum load impedance and the matching network is presented. The frequency bandwidth for both amplifiers was allocated to operate in the 2.620-2.690 GHz of mobile LTE applications. The second part explores the development of the behavioural model for the class AB power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier nonlinear distortion is approximated using a new linear parameter approximation approach. The first and second-order Hammerstein-Wiener using the Normalised Least Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of filtering process during linear memory cancellation. Moreover, an enhanced adaptive Wiener model is proposed to explore the nonlinear memory effect in the system. The proposed approach is able to balance between convergence speed and high-level accuracy when compared with behavioural modelling algorithms that are more complex in computation. Finally, the adaptive predistorter technique is implemented and verified in the OFDM transceiver test-bed. The results were compared against the computed one from MATLAB simulation for OFDM and 5G modulation transmitters. The results have confirmed the reliability of the model and the effectiveness of the proposed predistorter.Fundacão para a Ciência e a Tecnologia, Portugal, under European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424 I also acknowledge the role of the National Space Research and Development Agency (NASRDA) Sokoto State Government Petroleum Technology Trust Fund (PTDF

Amplitude and phase modulation techniques for an asymmetric multi-level outphasing transmitter

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 93-95).New techniques for improving outphasing transmitters show potential of breaking the traditional linearity-efficiency trade-off by using highly efficient non-linear switching Power Amplifiers (PAs). This work focuses on two of the main building blocks of modem outphasing systems, the power supply switching network and the phase modulator. Both are ubiquitous building blocks in modern RF transceivers, and both are especially critical in Asymmetric Multilevel Outphasing (AMO) systems. A design of the power supply network and control scheme is proposed for an implementation in mm-wave operating frequencies as part of a complete transmitter in 45nm SOI CMOS utilizing four discrete power supplies and achieving data rates of up to 4GS/s. The design includes analysis and simulation of the control signal data path requirements for optimal system operation as well as switch optimization and effects of the driving strength on overall system performance. A new design concept is proposed for a phase modulator utilizing the phase shifthing capabilities of a resonant tank and the ability to seperately control the circuit properties via its components. A prototype in 65nm CMOS achieves 12 bits of resolution, with an Effective Number Of Bits (ENOB) of 10.2 bits and very fast settling time of less than 5 carrier cycles. The chip is also tested as a stand alone transmitter showing an EVM of less than 5% for 8-PSK modulation at maximum data rate, meeting the requirements for operation at the Medical Implant Communication Services (MICS) band.by Gilad Yahalom.S.M

Multiphysics modelling of high-speed optoelectronic devices for silicon photonics platforms

L'abstract è presente nell'allegato / the abstract is in the attachmen

Proceedings of the Second International Mobile Satellite Conference (IMSC 1990)

Presented here are the proceedings of the Second International Mobile Satellite Conference (IMSC), held June 17-20, 1990 in Ottawa, Canada. Topics covered include future mobile satellite communications concepts, aeronautical applications, modulation and coding, propagation and experimental systems, mobile terminal equipment, network architecture and control, regulatory and policy considerations, vehicle antennas, and speech compression

Multi-Band Outphasing Power Amplifier Design for Mobile and Base Stations

New generations of wireless communication systems require linear efficient RF power amplifiers (PAs) for higher transmission data rates and longer battery life. On the contrary, conventional PAs are normally designed for peak efficiency under maximum output power (Pout). Thus, in power back-off, the overall efficiency degrades significantly and the average efficiency is much lower than the efficiency at maximum Pout. Chireix outphasing PA, also called LINC (Linear amplification using Non-linear Components), is one of the most promising techniques to improve the efficiency at power back-off. In this method, a variable envelope input signal is first decomposed into two constant-envelope phase-modulated signals and then amplified using two highly efficient non-linear PAs. The output signals are combined preferably in a loss-less power combiner to build the desired output signal. In this way, the PA exhibits high efficiency with good linearity. In this thesis, first we analyze a complex model of outphasing combiner considering its nonidealities such as reflection and loss in transmission lines (TL). Then we propose a compact model with analytical formula that is validated through several comparative tests using ADS and Spectre RF. Furthermore, we analyze the effect of reactive load in Chireix combiner with stubs (a parallel inductor and capacitor), while distinguishing between its capacitive and inductive parts. It is demonstrated that only the capacitive part of the reactive load degrades the performances. Based on this, a new architecture (Z LINC) is proposed where the power combiner is designed to provide a zero capacitive load to the PAs whatever the outphasing angle. The theory describing the operations of the system is developed and a 900 MHz classical LINC and Z-LINC PAs are designed and measured. In addition, a miniaturization technique is proposed which employs λ/8 or smaller TLs instead of conventional λ/4 TLs in outphasing power combiner. This technique is applied to implement a 900 MHz PA using LDMOS power transistors. Besides single-band PAs, dual-band PAs are more and more needed because of an increasing demand for wireless communication terminals to handle multi-band operation. In chapter 5, a new compact design approach for dual-band transmitters based on a reconfigurable outphasing combiner is proposed. The objective is to avoid the cumbersome implementations where several PAs and matching network are used in parallel. The technique is applied to design a dual band PA with a fully integrated power combiner in 90 nm CMOS technology. An inverter-based class D PA topology, particularly suitable for outphasing and multimode operations is presented. The TLs in the combiner, realized using a network of on-chip series inductors and parallel capacitors, are reconfigurable from λ/4 in 1800 MHz to λ/8 in 900 MHz. In order to maximize the efficiency, the on-chip inductors are implemented using high quality factor on chip slab inductors. The measured maximum Pout at 900/1800 MHz are 24.3 and 22.7 dBm with maximum efficiencies of 51% and 34% respectively