2,879 research outputs found
Design Automation and Design Space Exploration for Quantum Computers
A major hurdle to the deployment of quantum linear systems algorithms and
recent quantum simulation algorithms lies in the difficulty to find inexpensive
reversible circuits for arithmetic using existing hand coded methods. Motivated
by recent advances in reversible logic synthesis, we synthesize arithmetic
circuits using classical design automation flows and tools. The combination of
classical and reversible logic synthesis enables the automatic design of large
components in reversible logic starting from well-known hardware description
languages such as Verilog. As a prototype example for our approach we
automatically generate high quality networks for the reciprocal , which is
necessary for quantum linear systems algorithms.Comment: 6 pages, 1 figure, in 2017 Design, Automation & Test in Europe
Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 201
Minimization of Quantum Circuits using Quantum Operator Forms
In this paper we present a method for minimizing reversible quantum circuits
using the Quantum Operator Form (QOF); a new representation of quantum circuit
and of quantum-realized reversible circuits based on the CNOT, CV and
CV quantum gates. The proposed form is a quantum extension to the
well known Reed-Muller but unlike the Reed-Muller form, the QOF allows the
usage of different quantum gates. Therefore QOF permits minimization of quantum
circuits by using properties of different gates than only the multi-control
Toffoli gates. We introduce a set of minimization rules and a pseudo-algorithm
that can be used to design circuits with the CNOT, CV and CV quantum
gates. We show how the QOF can be used to minimize reversible quantum circuits
and how the rules allow to obtain exact realizations using the above mentioned
quantum gates.Comment: 11 pages, 14 figures, Proceedings of the ULSI Workshop 2012 (@ISMVL
2012
Synthesis of Topological Quantum Circuits
Topological quantum computing has recently proven itself to be a very
powerful model when considering large- scale, fully error corrected quantum
architectures. In addition to its robust nature under hardware errors, it is a
software driven method of error corrected computation, with the hardware
responsible for only creating a generic quantum resource (the topological
lattice). Computation in this scheme is achieved by the geometric manipulation
of holes (defects) within the lattice. Interactions between logical qubits
(quantum gate operations) are implemented by using particular arrangements of
the defects, such as braids and junctions. We demonstrate that junction-based
topological quantum gates allow highly regular and structured implementation of
large CNOT (controlled-not) gate networks, which ultimately form the basis of
the error corrected primitives that must be used for an error corrected
algorithm. We present a number of heuristics to optimise the area of the
resulting structures and therefore the number of the required hardware
resources.Comment: 7 Pages, 10 Figures, 1 Tabl
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