17,393 research outputs found

    Polynomial-time Solvable #CSP Problems via Algebraic Models and Pfaffian Circuits

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    A Pfaffian circuit is a tensor contraction network where the edges are labeled with changes of bases in such a way that a very specific set of combinatorial properties are satisfied. By modeling the permissible changes of bases as systems of polynomial equations, and then solving via computation, we are able to identify classes of 0/1 planar #CSP problems solvable in polynomial-time via the Pfaffian circuit evaluation theorem (a variant of L. Valiant's Holant Theorem). We present two different models of 0/1 variables, one that is possible under a homogeneous change of basis, and one that is possible under a heterogeneous change of basis only. We enumerate a series of 1,2,3, and 4-arity gates/cogates that represent constraints, and define a class of constraints that is possible under the assumption of a ``bridge" between two particular changes of bases. We discuss the issue of planarity of Pfaffian circuits, and demonstrate possible directions in algebraic computation for designing a Pfaffian tensor contraction network fragment that can simulate a swap gate/cogate. We conclude by developing the notion of a decomposable gate/cogate, and discuss the computational benefits of this definition

    Sublogarithmic uniform Boolean proof nets

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    Using a proofs-as-programs correspondence, Terui was able to compare two models of parallel computation: Boolean circuits and proof nets for multiplicative linear logic. Mogbil et. al. gave a logspace translation allowing us to compare their computational power as uniform complexity classes. This paper presents a novel translation in AC0 and focuses on a simpler restricted notion of uniform Boolean proof nets. We can then encode constant-depth circuits and compare complexity classes below logspace, which were out of reach with the previous translations.Comment: In Proceedings DICE 2011, arXiv:1201.034

    Variational Quantum Time Evolution without the Quantum Geometric Tensor

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    The real- and imaginary-time evolution of quantum states are powerful tools in physics and chemistry to investigate quantum dynamics, prepare ground states or calculate thermodynamic observables. They also find applications in wider fields such as quantum machine learning or optimization. On near-term devices, variational quantum time evolution is a promising candidate for these tasks, as the required circuit model can be tailored to trade off available device capabilities and approximation accuracy. However, even if the circuits can be reliably executed, variational quantum time evolution algorithms quickly become infeasible for relevant system sizes. They require the calculation of the Quantum Geometric Tensor and its complexity scales quadratically with the number of parameters in the circuit. In this work, we propose a solution to this scaling problem by leveraging a dual formulation that circumvents the explicit evaluation of the Quantum Geometric Tensor. We demonstrate our algorithm for the time evolution of the Heisenberg Hamiltonian and show that it accurately reproduces the system dynamics at a fraction of the cost of standard variational quantum time evolution algorithms. As an application, we calculate thermodynamic observables with the QMETTS algorithm

    Enabling High-Dimensional Hierarchical Uncertainty Quantification by ANOVA and Tensor-Train Decomposition

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    Hierarchical uncertainty quantification can reduce the computational cost of stochastic circuit simulation by employing spectral methods at different levels. This paper presents an efficient framework to simulate hierarchically some challenging stochastic circuits/systems that include high-dimensional subsystems. Due to the high parameter dimensionality, it is challenging to both extract surrogate models at the low level of the design hierarchy and to handle them in the high-level simulation. In this paper, we develop an efficient ANOVA-based stochastic circuit/MEMS simulator to extract efficiently the surrogate models at the low level. In order to avoid the curse of dimensionality, we employ tensor-train decomposition at the high level to construct the basis functions and Gauss quadrature points. As a demonstration, we verify our algorithm on a stochastic oscillator with four MEMS capacitors and 184 random parameters. This challenging example is simulated efficiently by our simulator at the cost of only 10 minutes in MATLAB on a regular personal computer.Comment: 14 pages (IEEE double column), 11 figure, accepted by IEEE Trans CAD of Integrated Circuits and System

    Tensor Computation: A New Framework for High-Dimensional Problems in EDA

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    Many critical EDA problems suffer from the curse of dimensionality, i.e. the very fast-scaling computational burden produced by large number of parameters and/or unknown variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g. 3-D field solvers discretizations and multi-rate circuit simulation), nonlinearity of devices and circuits, large number of design or optimization parameters (e.g. full-chip routing/placement and circuit sizing), or extensive process variations (e.g. variability/reliability analysis and design for manufacturability). The computational challenges generated by such high dimensional problems are generally hard to handle efficiently with traditional EDA core algorithms that are based on matrix and vector computation. This paper presents "tensor computation" as an alternative general framework for the development of efficient EDA algorithms and tools. A tensor is a high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high-dimensional EDA problems. This paper gives a basic tutorial on tensors, demonstrates some recent examples of EDA applications (e.g., nonlinear circuit modeling and high-dimensional uncertainty quantification), and suggests further open EDA problems where the use of tensor computation could be of advantage.Comment: 14 figures. Accepted by IEEE Trans. CAD of Integrated Circuits and System
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