Stepwise decomposition in controlpath synthesis

A method is presented for the synthesis of the microarchitecture of controlpaths. This method is called stepwise decomposition. It focuses primarily on controlpaths of instruction set processors, however it is also applicable for more general Finite State Machine synthesis. Many of the current controlpath synthesis algorithms are based on a fixed microarchitecture, and an optimization of that microarchitecture. This stepwise decomposition method is able to synthesize microarchitectures in a range from a single PLA to multiple PLA/ROM configurations and optionally further down to hardwired, which makes it more flexible and better suited to a wider range of controlpaths than current synthesis methods. A sequence of decomposition steps, from coarse to detailed, is performed on the design to move it to the area of the design space where all constraints on space, floorplan and delay are satisfied. The method is currently implemented in APL

Towards a design of HMO, an integrated hardware microcode optimizer

This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in micro-programmable machines. Besides presenting the algorithm itself, this research also analyzes the algorithm\u27s uses, design integration problems, architectural requirements, and adaptability to conventional machine characteristics. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process --Abstract, page ii

Analysis and classification of microprogrammed computers.

Massachusetts Institute of Technology. Dept. of Electrical Engineering. Thesis. 1972. M.S.MICROFICHE COPY ALSO AVAILABLE IN BARKER ENGINEERING LIBRARY.Includes bibliographical references.M.S

Mascot: Microarchitecture Synthesis of Control Paths

This paper presents MASCOT (MicroArchitecture Synthesis of ConTrol paths). This synthesis system constructs the optimal microarchitecture for a control path of an instruction set processor. Input to the system is the behavioural specification of a control path. This specification is in finite state machine form which is mapped initially onto a single programmed logic array (PLA) microarchitecture. The synthesis strategy then applies a sequence of decompositions on this initial microarchitecture. This strategy follows a decision scheme until all design objectives are met. It transforms the initial microarchitecture into a complex microarchitecture of several PLAs and ROMs. Where it is impossible to meet the design objectives, the system constructs a microarchitecture which comes as close as possible to given design objectives. Design objectives are allowed on floorplan dimensions and delay. Our strategy integrates a number of known optimization methods for specific microarchitectures. Therefore this synthesis method explores a larger part of the design space than do other control path synthesis methods. Other methods are mostly bound to one microarchitecture which they optimize. Our system is not only very flexible in microarchitecture construction but also open for extension by other optimizations