104 research outputs found
Parallel Implementation of Relational Algebra Operations on a Multi-Comparand Associative Machine
In this paper, we propose a new multi-comparand associative machine (MCA-machine) and its application to relational algebra operations. We first offer a new efficient associative algorithm for the multi-comparand parallel search. It generalizes the Falkoff associative algorithm that performs a parallel search in a matrix based on the exact match with a given pattern. Then we apply the new associative algorithm to implement one group of the relational algebra operations on the MCA-machine. Then, we propose efficient associative algorithms for implementing another group of the relational algebra operations. The proposed algorithms are represented as corresponding procedures for the MCA-machine. We prove their correctness and evaluate their time complexity
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System and method for searching a data base using a content-searchable memory
" A dynamic storage device requires periodic refresh and includes logical operation circuitry within the refresh circuitry. The individual storage positions of the storage device are periodically read by a refresh amplifier, and then a logical operation is performed on the refresh data before the data re applied to the write amplifier. That operation allows implementation of associative database searching by cyclically executing ""data compare"" and other logical operations within the refresh circuitry. A system of content searching may be implemented in any storage device, dynamic or not, in which a comparand may be matched with any of a plurality of subunits of a word, and a storage bit is used to identify any words in which a mismatch occurs. Upon recognizing a match, the device can be commanded (a) to output the word or a selected portion (which may be different than the matched portion), (b) to move a selected portion of the word to a different location in the word, or (c) to alter the bits of the word or a selected portion. Arithmetical operations may be implemented through such alterations after matching. Off-chip storage systems of use with such devices are also disclosed. "Board of Regents, University of Texas Syste
Empirically-Grounded Construction of Bug Prediction and Detection Tools
There is an increasing demand on high-quality software as software bugs have an economic impact not only on software projects, but also on national economies in general. Software quality is achieved via the main quality assurance activities of testing and code reviewing. However, these activities are expensive, thus they need to be carried out efficiently.
Auxiliary software quality tools such as bug detection and bug prediction tools help developers focus their testing and reviewing activities on the parts of software that more likely contain bugs. However, these tools are far from adoption as mainstream development tools. Previous research points to their inability to adapt to the peculiarities of projects and their high rate of false positives as the main obstacles of their adoption.
We propose empirically-grounded analysis to improve the adaptability and efficiency of bug detection and prediction tools. For a bug detector to be efficient, it needs to detect bugs that are conspicuous, frequent, and specific to a software project. We empirically show that the null-related bugs fulfill these criteria and are worth building detectors for. We analyze the null dereferencing problem and find that its root cause lies in methods that return null. We propose an empirical solution to this problem that depends on the wisdom of the crowd. For each API method, we extract the nullability measure that expresses how often the return value of this method is checked against null in the ecosystem of the API. We use nullability to annotate API methods with nullness annotation and warn developers about missing and excessive null checks.
For a bug predictor to be efficient, it needs to be optimized as both a machine learning model and a software quality tool. We empirically show how feature selection and hyperparameter optimizations improve prediction accuracy. Then we optimize bug prediction to locate the maximum number of bugs in the minimum amount of code by finding the most cost-effective combination of bug prediction configurations, i.e., dependent variables, machine learning model, and response variable. We show that using both source code and change metrics as dependent variables, applying feature selection on them, then using an optimized Random Forest to predict the number of bugs results in the most cost-effective bug predictor.
Throughout this thesis, we show how empirically-grounded analysis helps us achieve efficient bug prediction and detection tools and adapt them to the characteristics of each software project
Multi-Comparand Associative Machine and its Application to Relational Algebra Operations
In this paper, we propose a new multi-comparand associative machine (MCA-machine) and its application to relational algebra operations. We first offer a new efficient associative algorithm for the multi-comparand parallel search. It generalizes the Falkoff associative algorithm that performs a parallel search in a matrix based on the exact match with a given pattern. Then we apply the new associative algorithm to implement a group of the relational algebra operations on the MCA-machine. The proposed algorithms are represented as corresponding procedures for the MCA-machine. We prove their correctness and evaluate their time complexity
On Fault Modeling and Testing of Content-addressable Memories
Associative or content addressable memories can be used for many computing applications. This paper discusses fault modeling for the content addressable memory (CAM) chips. Detailed examination of a single CAM cell is presented. A functional fault model for a CAM architecture executing exact match derived from the single cell model is presented. An efficient testing strategy can be derived using the proposed fault mode
Design and characterization of MIS devices
This work is a part of the research performed at the Research Laboratory of Electronics (Elektronfysik III), concerning [metal-insulator-semiconductor] MIS field-effect devices. It deals with the properties of different memory devices, such as the [metal-nitride-oxide-semiconductor] MNOS and the [floating-gate avalanche-injection metal-oxide-semiconductor] FAMOS memory transistors, where the [metal insulator semiconductor] MIS structure is utilized for information storage. Paper A describes a new associative memory cell in which MNOS transistors are used as storage elements. Paper B describes the Negative Bias Stress of MOS devices at high electric fields with respect to the degradation observed in MNOS memory devices repeatedly operated at high write/erase gate voltages. Paper C deals with the FAMOS memory device and how the information may be unintentionally changed after a large number of read cycles. Paper D is concerned with some critical problems during fabrication of low threshold voltage CMOS circuits for digital watch applications. Paper E shows the influence of a narrow channel width on the threshold voltage in MOS transistors when modulated by the substrate-source voltage
B-LOG: A branch and bound methodology for the parallel execution of logic programs
We propose a computational methodology -"B-LOG"-, which offers the potential for an effective implementation of Logic Programming in a parallel computer. We also propose a weighting scheme to guide the search process through the graph and we apply the concepts of parallel "branch and bound" algorithms in order to perform a "best-first" search using an information theoretic bound. The concept of "session" is used to speed up the search process in a succession of similar queries. Within a session, we strongly modify the bounds in a local database, while bounds kept in a global database are weakly modified to provide a better initial condition for other sessions. We
also propose an implementation scheme based on a database
machine using "semantic paging", and the "B-LOG processor" based on a scoreboard driven controller
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