27 research outputs found

    VLSI design methodology

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    VLSI architectures for high speed Fourier transform processing

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    Public key cryptosystems : theory, application and implementation

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    The determination of an individual's right to privacy is mainly a nontechnical matter, but the pragmatics of providing it is the central concern of the cryptographer. This thesis has sought answers to some of the outstanding issues in cryptography. In particular, some of the theoretical, application and implementation problems associated with a Public Key Cryptosystem (PKC).The Trapdoor Knapsack (TK) PKC is capable of fast throughput, but suffers from serious disadvantages. In chapter two a more general approach to the TK-PKC is described, showing how the public key size can be significantly reduced. To overcome the security limitations a new trapdoor was described in chapter three. It is based on transformations between the radix and residue number systems.Chapter four considers how cryptography can best be applied to multi-addressed packets of information. We show how security or communication network structure can be used to advantage, then proposing a new broadcast cryptosystem, which is more generally applicable.Copyright is traditionally used to protect the publisher from the pirate. Chapter five shows how to protect information when in easily copyable digital format.Chapter six describes the potential and pitfalls of VLSI, followed in chapter seven by a model for comparing the cost and performance of VLSI architectures. Chapter eight deals with novel architectures for all the basic arithmetic operations. These architectures provide a basic vocabulary of low complexity VLSI arithmetic structures for a wide range of applications.The design of a VLSI device, the Advanced Cipher Processor (ACP), to implement the RSA algorithm is described in chapter nine. It's heart is the modular exponential unit, which is a synthesis of the architectures in chapter eight. The ACP is capable of a throughput of 50 000 bits per second

    STRICT: a language and tool set for the design of very large scale integrated circuits

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    PhD ThesisAn essential requirement for the design of large VLSI circuits is a design methodology which would allow the designer to overcome the complexity and correctness issues associated with the building of such circuits. We propose that many of the problems of the design of large circuits can be solved by using a formal design notation based upon the functional programming paradigm, that embodies design concepts that have been used extensively as the framework for software construction. The design notation should permit parallel, sequential, and recursive decompositions of a design into smaller components, and it should allow large circuits to be constructed from simpler circuits that can be embedded in a design in a modular fashion. Consistency checking should be provided as early as possible in a design. Such a methodology would structure the design of a circuit in much the same way that procedures, classes, and control structures may be used to structure large software systems. However, such a design notation must be supported by tools which automatically check the consistency of the design, if the methodology is to be practical. In principle, the methodology should impose constraints upon circuit design to reduce errors and provide' correctness by construction' . It should be possible to generate efficient and correct circuits, by providing a route to a large variety of design tools commonly found in design systems: simulators, automatic placement and routing tools, module generators, schematic capture tools, and formal verification and synthesis tools

    The Design of Microcomputer Systems

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    Coordinated Science Laboratory was formerly known as Control Systems LaboratoryJoint Services Electronics Program / DAAB-07-72-C-0259Ope

    The 1991 3rd NASA Symposium on VLSI Design

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    Papers from the symposium are presented from the following sessions: (1) featured presentations 1; (2) very large scale integration (VLSI) circuit design; (3) VLSI architecture 1; (4) featured presentations 2; (5) neural networks; (6) VLSI architectures 2; (7) featured presentations 3; (8) verification 1; (9) analog design; (10) verification 2; (11) design innovations 1; (12) asynchronous design; and (13) design innovations 2

    Investigation of Ultrasonics as a tool for energy efficient recycling of Lactic acid from postconsumer PLA products

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    The growing use of ecofriendly, biodegradable polymers have created a need for a suitable recycling technique because, unlike petroleum derived plastics, their properties deteriorate during conventional recycling. These new techniques must be cost efficient and yield material properties same as virgin polymer. This research investigates the effectiveness of high-power ultrasonics as an efficient technique to recover lactic acid from postconsumer polylactic acid (PLA) products. Polylactic acid is a commercially available bioplastic derived from corn starch and/or sugar cane that is biorenewable and compostable (biodegradable). The various ongoing researches to recover lactic acid from PLA employ a common platform of high temperature, high pressure (HTHP) to effect polymer hydrolysis. The energy intensiveness of these HTHP processes prompted this work to investigate ultrasonics as an low energy alternative process to cause PLA depolymerization. The energy consumption and the time required for depolymerization were utilized as the metrics to quantify and compare depolymerization enhanced by ultrasonics with hot-bath technique. The coupled effect of catalysts concentration and different solvents, along with ultrasonic were studied based on preliminary trial results. In addition, the correlation between the rates of de-polymerization was analyzed for ultrasonic amplitude, treatment time, and catalyst concentration and types. The results indicate that depolymerization of PLA was largely effected by heating caused by ultrasonic-induced cavitations. Other effects of ultrasonics, namely cavitations and acoustic streaming, were shown to have minimal effects in enhancing depolymerization. In fact, thermal energy predominately affected the reaction kinetics; the heat introduced by conventional method (i.e., electrical heaters) was more efficient than ultrasonic heating in terms of energy (for depolymerization) per unit mass of PLA and depolymerizing time. The degree of crystallinity also was an important factor that affected the reaction kinetics of depolymerization. It was found that amorphous PLA de-polymerized faster compared to semi-crystalline PLA under the same conditions. While the depolymerization of PLA was anticipated to require 15 to 30 minutes, or extreme conditions [40], it was determined that with K2CO3 or NaOH catalysts and methanol media as the conditions, PLA could be fully de-polymerized within a few minutes. This information provided insight for effective pathways for the depolymerization of PLA, reducing the environmental impact of material use on the environment. The effects of the ultrasonics were modeled with finite element analysis based on fundamental concepts. The predictions from the modeling were confirmed by studying real-time streaming and fluid flow inside the treatment cell utilizing particle image Velocimetry (PIV). The FEA (finite element analysis) models of ultrasonic streaming were verified and were in reasonable agreement with the experimental values, validating simple assumptions for future researchers
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