3,685 research outputs found

    A Fault-Based Model of Fault Localization Techniques

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    Every day, ordinary people depend on software working properly. We take it for granted; from banking software, to railroad switching software, to flight control software, to software that controls medical devices such as pacemakers or even gas pumps, our lives are touched by software that we expect to work. It is well known that the main technique/activity used to ensure the quality of software is testing. Often it is the only quality assurance activity undertaken, making it that much more important. In a typical experiment studying these techniques, a researcher will intentionally seed a fault (intentionally breaking the functionality of some source code) with the hopes that the automated techniques under study will be able to identify the fault\u27s location in the source code. These faults are picked arbitrarily; there is potential for bias in the selection of the faults. Previous researchers have established an ontology for understanding or expressing this bias called fault size. This research captures the fault size ontology in the form of a probabilistic model. The results of applying this model to measure fault size suggest that many faults generated through program mutation (the systematic replacement of source code operators to create faults) are very large and easily found. Secondary measures generated in the assessment of the model suggest a new static analysis method, called testability, for predicting the likelihood that code will contain a fault in the future. While software testing researchers are not statisticians, they nonetheless make extensive use of statistics in their experiments to assess fault localization techniques. Researchers often select their statistical techniques without justification. This is a very worrisome situation because it can lead to incorrect conclusions about the significance of research. This research introduces an algorithm, MeansTest, which helps automate some aspects of the selection of appropriate statistical techniques. The results of an evaluation of MeansTest suggest that MeansTest performs well relative to its peers. This research then surveys recent work in software testing using MeansTest to evaluate the significance of researchers\u27 work. The results of the survey indicate that software testing researchers are underreporting the significance of their work

    A Two-Tiered Correlation of Dark Matter with Missing Transverse Energy: Reconstructing the Lightest Supersymmetric Particle Mass at the LHC

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    We suggest that non-trivial correlations between the dark matter particle mass and collider based probes of missing transverse energy H_T^miss may facilitate a two tiered approach to the initial discovery of supersymmetry and the subsequent reconstruction of the LSP mass at the LHC. These correlations are demonstrated via extensive Monte Carlo simulation of seventeen benchmark models, each sampled at five distinct LHC center-of-mass beam energies, spanning the parameter space of No-Scale F-SU(5).This construction is defined in turn by the union of the Flipped SU(5) Grand Unified Theory, two pairs of hypothetical TeV scale vector-like supersymmetric multiplets with origins in F-theory, and the dynamically established boundary conditions of No-Scale Supergravity. In addition, we consider a control sample comprised of a standard minimal Supergravity benchmark point. Led by a striking similarity between the H_T^miss distribution and the familiar power spectrum of a black body radiator at various temperatures, we implement a broad empirical fit of our simulation against a Poisson distribution ansatz. We advance the resulting fit as a theoretical blueprint for deducing the mass of the LSP, utilizing only the missing transverse energy in a statistical sampling of >= 9 jet events. Cumulative uncertainties central to the method subsist at a satisfactory 12-15% level. The fact that supersymmetric particle spectrum of No-Scale F-SU(5) has thrived the withering onslaught of early LHC data that is steadily decimating the Constrained Minimal Supersymmetric Standard Model and minimal Supergravity parameter spaces is a prime motivation for augmenting more conventional LSP search methodologies with the presently proposed alternative.Comment: JHEP version, 17 pages, 9 Figures, 2 Table

    Design-for-delay-testability techniques for high-speed digital circuits

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    The importance of delay faults is enhanced by the ever increasing clock rates and decreasing geometry sizes of nowadays' circuits. This thesis focuses on the development of Design-for-Delay-Testability (DfDT) techniques for high-speed circuits and embedded cores. The rising costs of IC testing and in particular the costs of Automatic Test Equipment are major concerns for the semiconductor industry. To reverse the trend of rising testing costs, DfDT is\ud getting more and more important

    Simulation modelling software approaches to manufacturing problems

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    Increased competition in many industries has resulted in a greater emphasis on developing and using advanced manufacturing systems to improve productivity and reduce costs. The complexity and dynamic behaviour of such systems, make simulation modelling one of the most popular methods to facilitate the design and assess operating strategies of these systems. The growing need for the use of simulation is reflected by a growth in the number of simulation languages and data-driven simulators in the software market. This thesis investigates which characteristics typical manufacturing simulators possess, and how the user requirements can be better fulfilled. For the purpose of software evaluation, a case study has been carried out on a real manufacturing system. Several simulation models of an automated system for electrostatic powder coating have been developed using different simulators. In addition to the evaluation of these simulators, a comprehensive evaluation framework has been developed to facilitate selection of simulation software for modelling manufacturing systems. Different hierarchies of evaluation criteria have been established for different software purposes. In particular, the criteria that have to be satisfied for users in education differ from those for users in industry. A survey has also been conducted involving a number of users of software for manufacturing simulation. The purpose of the survey was to investigate users' opinions about simulation software, and the features that they desire to be incorporated in simulation software. A methodology for simulation software selection is also derived. It consists of guidelines related to the actions to be taken and factors to be considered during the evaluation and selection of simulation software. On the basis of all the findings, proposals on how manufacturing simulators can be improved are made, both for use in education and in industry. These software improvements should result in a reduction in the amount of time and effort needed for simulation model development, and therefore make simulation more beneficial

    Cost modelling and concurrent engineering for testable design

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    This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.As integrated circuits and printed circuit boards increase in complexity, testing becomes a major cost factor of the design and production of the complex devices. Testability has to be considered during the design of complex electronic systems, and automatic test systems have to be used in order to facilitate the test. This fact is now widely accepted in industry. Both design for testability and the usage of automatic test systems aim at reducing the cost of production testing or, sometimes, making it possible at all. Many design for testability methods and test systems are available which can be configured into a production test strategy, in order to achieve high quality of the final product. The designer has to select from the various options for creating a test strategy, by maximising the quality and minimising the total cost for the electronic system. This thesis presents a methodology for test strategy generation which is based on consideration of the economics during the life cycle of the electronic system. This methodology is a concurrent engineering approach which takes into account all effects of a test strategy on the electronic system during its life cycle by evaluating its related cost. This objective methodology is used in an original test strategy planning advisory system, which allows for test strategy planning for VLSI circuits as well as for digital electronic systems. The cost models which are used for evaluating the economics of test strategies are described in detail and the test strategy planning system is presented. A methodology for making decisions which are based on estimated costing data is presented. Results of using the cost models and the test strategy planning system for evaluating the economics of test strategies for selected industrial designs are presented

    Construction time-cost model in Croatia

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    The paper deals with the applicability of the time-cost model for calculating the sustainable construction time for building projects in Croatia. In this model the time is expressed as a function of money in the project, while the specific constants K and B need to be determined. These constants depend on economic characteristics of the country or a larger area, therefore had to be separately calculated for a region with similar economic characteristics. The modelling of the constants was performed for two groups of building projects - the roads and residential and office multi-storey buildings. The obtained results have been analyzed and compared to the corresponding results from abroad

    SOFTWARE TESTABILITY MEASURE FOR SAE ARCHITECTURE ANALYSIS AND DESIGN LANGUAGE (AADL)SOFTWARE TESTABILITY MEASURE FOR SAE ARCHITECTURE ANALYSIS AND DESIGN LANGUAGE (AADL)

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    Testability is an important quality attribute of software, especially for critical systems such as avionics, medical, and automotive. Improvement in the early testability of software architecture, the first artifact of the software system, will help reduce issues and costs later in the development process. AADL, an architecture analysis description language suitable for critical embedded, real-time systems, can be used for design documentation, analysis and code generation. Because the capability of AADL can be extended, it is possible to add new analyses to its core language. Tools such as the Open Source AADL Tool Environment (OSATE) provide plugins for processing AADL models. Although adding new plugins in OSATE extends AADL, there currently exists no AADL extension for testability measurement. The purpose of this thesis is to propose such a method to measure the testability of AADL models as well as to develop a testability plugin in OSATE. Much research has been conducted on testability of hardware, software and embedded systems, resulting in several approaches for measuring this quality attribute. Among them, the approach measuring testability as a product of controllability and observability using information transfer graph (ITG) is the most applicable for measuring the testability of AADL models. This thesis proposes a method applying this approach to AADL models. A complete testability measure plugin for OSATE was developed based on this approach and detailed examples are given in this thesis to demonstrate its applicability
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