578 research outputs found
Gate stability of GaN-Based HEMTs with P-Type Gate
status: publishe
The 2018 GaN Power Electronics Roadmap
Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here
AlGaN/GaN ์ ๋ ฅ์์์ ํน์ฑ ํฅ์์ ์ํ ์๊ฐ๊ณผ ์ ์ฐ๋ง์ ๊ดํ ์ฐ๊ตฌ
ํ์๋
ผ๋ฌธ (๋ฐ์ฌ) -- ์์ธ๋ํ๊ต ๋ํ์ : ๊ณต๊ณผ๋ํ ์ ๊ธฐยท์ ๋ณด๊ณตํ๋ถ, 2020. 8. ์๊ด์.์ต๊ทผ ์๋์ง ์๊ธฐ์ ํ๊ฒฝ๊ท์ ๊ฐํ, ์นํ๊ฒฝ ๋
น์์ฑ์ฅ ๋ฑ์ ์ด์๊ฐ ๋๋๋์ด ์๋์ง ์ ๊ฐ๊ณผ ํ๊ฒฝ ๋ณดํธ ๋ถ์ผ์ IT ๊ธฐ์ ์ ์ ๋ชฉ, ํ์ฉํ๋ ๊ทธ๋ฆฐ IT ํจ๋ฌ๋ค์์ด ๋ถ๊ฐ๋๊ณ ์๋ค. ํ์ฌ ๊ณ ์ ๊ฐ ํ๊ฒฝ๊ท์ ๊ฐํ์ ๋์ํ๊ธฐ ์ํด ํ์ด๋ธ๋ฆฌ๋ ์๋์ฐจ, ์ ๊ธฐ์๋์ฐจ ๋ฑ ์นํ๊ฒฝ ๋ฏธ๋ํ ์๋์ฐจ ๊ฐ๋ฐ์ด ์๊ตฌ๋๊ณ ์์ผ๋ฉฐ, ์๋์ฐจ์์ ์ ์ฅ๋ถํ์ด ์ฐจ์งํ๋ ์๊ฐ๋น์ค์ ์ฝ 40%๊น์ง ๋ฌํ ๊ฒ์ผ๋ก ์ ๋ง๋๊ณ ์ด ์ค ๋ฐ๋์ฒด๊ฐ ์ฐจ์งํ๋ ๋น์ฉ์ ์ฝ 30% ์ ๋๋ก ์ถ์ ๋๋ค. ์ด๋ฌํ ์๋์ฐจ ์ ์ฅ๋ถํ์์ ์ ๋ ฅ์์๊ฐ ํต์ฌ๋ถํ์ผ๋ก ์๋ฆฌ ์ก์ ์ ๋ง์ด๋ค. ์ง๊ธ๊น์ง๋ ์ค๋ฆฌ์ฝ ๊ธฐ๋ฐ์ ์ ๋ ฅ์์ ๊ธฐ์ ์ด ์ ๋ ฅ๋ฐ๋์ฒด ์์ฅ์ ๋๋ถ๋ถ์ ์ฃผ๋ํ๊ณ ์์ง๋ง ์ ๋ ฅ๊ธฐ๊ธฐ ๋ก๋๋งต์ ์ํ๋ฉด ์ ๋ ฅ๋ฐ๋๊ฐ ํด๋ฅผ ๊ฑฐ๋ญํ๋ฉด์ ์ง์์ ์ผ๋ก ์ฆ๊ฐํ๊ธฐ ๋๋ฌธ์ ๋ด์ด, ๋ด์, ์ ๋ ฅ์์ค, ์ ๋ ฅ๋ฐ๋ ๋ฑ์์ ๋ํ๋๋ ๋ง์ ํ๊ณ๋ฅผ ๊ฐ์ง๊ณ ์๋ ํ์ฌ์ ์ค๋ฆฌ์ฝ ๊ธฐ๋ฐ ์ ๋ ฅ์์คํ
์ ํจ์จ์ด ๋์ ๋๊ฒ ๊ฐ์ํ ๊ฒ์ด ์๋ช
ํ๋ฏ๋ก ์ ๋ ฅ์์คํ
์ ์ ๋ ฅ์ ์กํจ์จ๊ณผ ์ ๋ขฐ์ฑ์ ์ค์์ฑ์ด ํฌ๊ฒ ๋๋๋๊ณ ์๋ค. ์ด ๊ฐ์ ์ฌํ์ ์๊ตฌ๋ก ๋ณผ ๋ ํ์ฌ์ ์ค๋ฆฌ์ฝ ์ ๋ ฅ์์์ ๊ธฐ์ ์ ํ๊ณ๋ฅผ ๋ฐ์ด๋๋ ๊ณ ํจ์จ์ ์ฐจ์ธ๋ ์ ๋ ฅ๋ฐ๋์ฒด ์์์ ๊ฐ๋ฐ์ด ์๊ธํ ์๊ตฌ๋๋ฉฐ SiC์ GaN์ ๊ฐ์ ๊ด๋์ญ ๋ฐ๋์ฒด๊ฐ ์ฐจ์ธ๋ ์ ๋ ฅ๋ฐ๋์ฒด ์์ฌ๋ก ์ ๋ ฅํด์ง๊ณ ์๋ค. ๋ํ ์ ๋ ฅ์์คํ
์์๋ ์์คํ
์ ์์ ์ฑ๊ณผ ํ๋ก์ ๊ฐ๋ตํ๋ฅผ ์ํ์ฌ normally-off (์ฆ๊ฐํ) ์ ๋ ฅ์์๊ฐ ์๊ตฌ๋๊ธฐ ๋๋ฌธ์ normally-off (์ฆ๊ฐํ) GaN ์ ๋ ฅ์์์ ๋ํ ๊ฐ๋ฐ์ด ํ์์ ์ด๋ค.
๋ณธ ๊ทธ๋ฃน์์๋ gate-recess ๊ณต์ ์ ์ด์ฉํ์ฌ normally-off ๋์์ ์คํํ๋ ์ฐ๊ตฌ๋ฅผ ์งํํ์๊ณ , gate-recess ์ ๋ฐ์ํ๋ ์๊ฐ ๋ฐ๋ฏธ์ง๋ฅผ ์ค์ด๊ณ ์ฐ์ํ ์ฑ๋ฅ์ ๊ฒ์ดํธ ์ ์ฐ๋ง์ ๊ฐ๋ฐํ์ฌ GaN ์ ๋ ฅ ๋ฐ๋์ฒด ์์์ ์ ๊ธฐ์ ํน์ฑ ๋ฐ ์ ๋ขฐ์ฑ์ ๊ฐ์ ํ๋ ์ฐ๊ตฌ๋ฅผ ์งํํ์๋ค. ์๊ฐ ์ฐ๊ตฌ์์๋ ์ต์ข
์ ์ผ๋ก ์
ํ DC ๋ฐ์ด์ด์ค๊ฐ ๋ฎ์ O2, BCl3 ํ๋ผ์ฆ๋ง๋ฅผ ์ด์ฉํ atomic layer etching์ ๊ฐ๋ฐํ์๊ณ , ์ด๋ฅผ ํตํด ๊ฑฐ์น ๊ธฐ๊ฐ ์๊ณ ํ๋ฉด N vacancy๊ฐ ์ ์ ๊ณ ํ์ง์ (Al)GaN ํ๋ฉด์ ์ป์ ์ ์์๋ค. ๋ฐ๋ง ์ฐ๊ตฌ์์๋ Oxide ๋ฐ๋ง ์ฆ์ฐฉ ์, (Al)GaN ํ๋ฉด์ ์์ฑ๋์ด ๊ณ๋ฉด ํน์ฑ์ ์
ํ์ํค๋ Ga2O3 ์์ฑ์ ๋ง๊ธฐ์ํด ALD AlN layer๋ฅผ ๊ฐ๋ฐ ๋ฐ ์ ์ฉํ์ฌ ๋ฐ๋ง/(Al)GaN ๊ณ๋ฉด ํน์ฑ์ ํฅ์์์ผฐ๋ค. ์ด๋ก ์ธํด ์์์ ๋์์ ๋ฅ ์ฆ๊ฐ ๋ฐ Dit ๊ฐ์ ๊ฒฐ๊ณผ๋ฅผ ์ป์ ์ ์์๊ณ ์คํธ๋ ์ค์ ๋ฐ๋ฅธ ๋ฌธํฑ์ ์ ์ด๋ ํน์ฑ์ ๊ฐ์๋ก ์์์ ์ ๋ขฐ์ฑ ๋ํ ๊ฐ์ ์ํฌ ์ ์์๋ค. ์ด๋ ํ ๊ธฐ๊ด์ ๊ฒฐ๊ณผ์ ๋น๊ตํด๋ ๋ค๋จ์ด์ง์ง ์๋ ์ฐ์ํ ํน์ฑ์ ๋ณด์ฌ์ฃผ์๋ค.
๊ฒฐ๋ก ์ ์ผ๋ก ๋ณธ ์ฐ๊ตฌ์ ์์ ํ๋ผ์ฆ๋ง ๋ฐ๋ฏธ์ง๋ฅผ ๊ฐ๋ ์๊ฐ๊ณต์ ๊ณผ ๊ณ ํ์ง ์ ์ฐ๋ง ๊ฐ๋ฐ์ ํตํด ์ฐ์ํ ํน์ฑ์ GaN ์ ๋ ฅ์์๋ฅผ ๊ตฌํํ ์ ์์๊ณ ํฅํ ์ฐจ์ธ๋ ์ ๋ ฅ์์์ ์ ์ฉ์ ์ํ ๊ฐ๋ฅ์ฑ์ ํ๋ณดํ์๋ค.The Si technology for power devices have already approached its theoretical limitations due to its physical and material properties, despite the considerable efforts such as super junction MOSFET, trench gate, and insulated gate bipolar transistors. To overcome these limitations, many kinds of compound materials such as GaN, GaAs, SiC, Diamond and InP which have larger breakdown voltage and high electron velocity than Si also have been studied as future power devices. GaN has been considered as a breakthrough in power applications due to its high critical electric field, high saturation velocity and high electron mobility compared to Si, GaAs, and SiC. Especially, AlGaN/GaN heterostructure field-effect transistors (HFETs) have been considered as promising candidates for high power and high voltage applications.
However, these AlGaN/GaN heterostructure field-effect transistors with the 2DEG are naturally normally-on, which makes the devices difficult to deplete the channel at zero gate bias. Among the various methods for normally-off operation of GaN devices, gate-recess method is a promising method because it can be easier to implement than other approaches and ensure normally-off operation. However, charge trapping at the interface between gate dielectric and (Al)GaN and in the gate dielectric is a big issue for recessed gate MIS-HEMTs. This problem leads to degradation of channel mobility, on-resistance and on-current of the devices. Especially, Vth hysteresis after a positive gate voltage sweep and Vth shift under a gate bias stress are important reliability challenges in gate recessed MIS-HEMTs.
The scope of this work is mainly oriented to achieve high quality interface at dielectric/(Al)GaN MIS by studying low damage etching methods and the ALD process of various dielectric layers.
In the etching study, various etching methods for normally-off operation have been studied. Also, etching damage was evaluated by various methods such as atomic force microscopy (AFM), photoluminescence (PL) measurements, X-ray photoelectron spectroscopy (XPS) measurements and electrical properties of the recessed schottky devices. Among the etching methods, the ALE shows the smoothest etched surface, the highest PL intensity and N/(Al+Ga) ratio of the etched AlGaN surface and the lowest leakage current of the gate recessed schottky devices. It is suggested that the ALE is a promising etching technique for normally-off gate recessed AlGaN/GaN MIS-FETs.
In the study of dielectrics, excellent electrical characteristics and small threshold voltยฌage drift under positive gate bias stress are achieved by employing the SiON interfacial layer. However, considerable threshold voltage drift is observed under the higher positive gate bias stress even at the devices using the SiON interfacial layer. For further improvement of interface and reliability of devices, we develop and optimize an ALD AlN as an interfacial layer to avoid the formation of poor-quality oxide at the dielectric/(Al)GaN interface. We also develop an ALD AlHfON as a bulk layer, which have a high dielectric constant and low leakage current and high breakdown field characteristics. Devices with AlN/AlON/AlHfON layer show smaller I-V hysteresis of ~10 mV than that of devices with AlON/AlHfON layer. The extracted static Ron values of devices with AlN/AlON/AlHfON and AlON/AlHfON are 1.35 and 1.69 mโฆยทcm2, respectively. Besides, the effective mobility, Dit and threshold voltage instability characteristics are all improved by employing the ALD AlN.
In conclusion, for high performance and improvement of reliability of normally-off AlGaN/GaN MIS-FETs, this thesis presents an etching technique for low damage etching and high-quality gate dielectric layer and suggests that the ALE and ALD AlN/AlON/AlHfON gate dielectric are very promising for the future normally-off AlGaN/GaN MIS-FETsChapter 1. Introduction 1
1.1. Backgrounds 1
1.2. Normally-off Operation in AlGaN/GaN HFETs 3
1.3. Issues and Feasible Strategies in AlGaN/GaN MIS-HFETs 11
1.4. Research Aims 15
1.5. References 17
Chapter 2. Development and Evaluation of Low Damage Etching processes 22
2.1. Introduction 22
2.2. Various Evaluation Methods of Etching Damage 24
2.3. Low-Damage Dry Etching Methods 29
2.3.1. Inductively Coupled Plasma-Reactive Ion Etching Using BCl3/Cl2 Gas Mixture 29
2.3.2. Digital Etching Using Plasma Asher and HCl 34
2.3.3. Atomic Layer Etching Using Inductively Coupled PlasmaโReactive Ion Etching System (ICP-RIE) 50
2.4. Conclusion 75
2.5. References 76
Chapter 3. SiON/HfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 80
3.1. Introduction 80
3.2. ALD Processes for SiON and HfON 83
3.3. Electrical Characteristics of ALD SiON, HfON and SiON/HfON Dual Layer on n-GaN 87
3.4. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with SiON/HfON Dual Layer 95
3.5. Conclusion 113
3.6. References 114
Chapter 4. High Quality AlN/AlON/AlHfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 120
4.1. Introduction 120
4.2. Development of ALD AlN/AlON/AlHfON Gate Stack 122
4.2.1. Process Optimization for ALD AlN 122
4.2.2. ALD AlN as an Interfacial Layer 144
4.2.3. Thickness Optimization of AlN/AlON/ AlHfON Layer 149
4.2.4. ALD AlHfON Optimization 159
4.2.5. Material Characteristics of AlN/AlON/AlHfON Layer 167
4.3. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with AlN/AlON/AlHfON Layer 171
4.4. Conclusion 182
4.5. References 183
Chapter 5. Concluding Remarks 188
Appendix. 190
A. N2 Plasma Treatment Before Dielectric Deposition 190
B. Tri-gate Normally-on/off AlGaN/GaN MIS-FETs 200
C. AlGaN/GaN Diode with MIS-gated Hybrid Anode and Edge termination 214
Abstract in Korean 219
Research Achievements 221Docto
Optimization of off-state breakdown voltage in GaN high-electron-mobility transistors
Gallium nitride (GaN) technology is the next revolution in electronics as it offers a large bandgap (high critical electric field) and high electron mobility (2D electron gas) in one transistor design, surpassing silicon (Si), gallium arsenide (GaAs), and indium phosphide (InP) based technologies. High efficiency and high voltage operation of GaN high electron mobility transistors (HEMTs) provide significant performance and size advantages over the aforementioned devices. GaN HEMTs are normally-on devices, meaning that the devices do not shut down even though no gate voltage is applied, due to the 2D electron gas channel. In applications where safety and efficiency are in the forefront, normally-off devices are preferred. A simple way to obtain a normally-off GaN HEMT is to apply a negative gate voltage. A challenge of normally-off GaN HEMT is that the devices usually fail before the critical electric field is reached. Breakdown is caused by gate-leakage impact-ionization, drain-to-source punchthrough and vertical current leakage. Increasing the breakdown voltage would eliminate the damage in high voltage, high current applications and would extend the lifetime and operating bias conditions. The goal of this research is to design and simulate GaN-based power transistors in order to understand their different characteristics, such as voltage-current relations, using TCAD Sentaurus software. GaN HEMTs with different design strategies (i.e. doping concentration, layer thicknesses, layer contents) are simulated in order to understand their impact on off-state breakdown voltages. Based on the simulation results, different strategies to improve the off-state breakdown voltage are proposed.Ope
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Diamond power devices: State of the art, modelling and figures of merit
With its remarkable electro-thermal properties such as the highest known thermal conductivity (~22W/cmbold dotK at room temperature) of any material, high hole mobility (> 2000cm2/Vbold dots), high critical electric field (>10MV/cm), and large bandgap (5.47eV), diamond has overwhelming advantages over silicon and other wide bandgap semiconductors (WBG) for ultra-high- voltage and high temperature applications (>3kV and >450 K, respectively). However, despite their tremendous potential, fabricated devices based on this material have not delivered yet the expected high-performance. The main reason behind this is the absence of shallow donor and acceptor species. The second reason is the lack of consistent physical models and design approaches specific to diamond-based devices that could significantly accelerate their development. The third reason is that the best performances of diamond devices are expected only when the highest electric field in reverse bias can be achieved, something that has not been widely obtained yet. In this context, high temperature operation and unique device structures based on the 2DHG formation represent two alternatives which could alleviate the issue of the incomplete ionization of dopant species. Nevertheless, ultra-high temperature operations and device parallelization could result in severe thermal management issues and affect the overall stability and long-term reliability. Additionally, problems connected to the reproducibility and the long-term stability of 2DHG based-devices still need to be resolved. This review paper aims at addressing these issues by providing the power device research community with a detailed set of physical models, device designs and challenges associated to all the aspects of the diamond power device value chain, from the definition of figures of merits, the material growth and processing conditions, to packaging solutions and targeted applications. Finally, the paper will conclude with suggestions on how to design power converters with diamond devices and will provide the roadmap of diamond devices development for power electronics.This work was supported by the U.K. Engineering and Physical Sciences Research Council for the University of Cambridge Centre for Doctoral Training under Grant EP/M506485/1 and by the French ANR Research Agency under grant ANR-16-CE05-0023 #Diamond-HVDC. The research leading to these results has been performed within the GREENDIAMOND project and received funding from the European Community's Horizon 2020 Programme (H2020/2014โ2020) under grant agreement no. 640947
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Diamond power devices: state of the art, modelling, figures of merit and future perspective
Abstract: With its remarkable electro-thermal properties such as the highest known thermal conductivity (~22 W cmโ1โKโ1 at RT of any material, high hole mobility (>2000 cm2 Vโ1 sโ1), high critical electric field (>10 MV cmโ1), and large band gap (5.47 eV), diamond has overwhelming advantages over silicon and other wide bandgap semiconductors (WBGs) for ultra-high-voltage and high-temperature (HT) applications (>3 kV and >450 K, respectively). However, despite their tremendous potential, fabricated devices based on this material have not yet delivered the expected high performance. The main reason behind this is the absence of shallow donor and acceptor species. The second reason is the lack of consistent physical models and design approaches specific to diamond-based devices that could significantly accelerate their development. The third reason is that the best performances of diamond devices are expected only when the highest electric field in reverse bias can be achieved, something that has not been widely obtained yet. In this context, HT operation and unique device structures based on the two-dimensional hole gas (2DHG) formation represent two alternatives that could alleviate the issue of the incomplete ionization of dopant species. Nevertheless, ultra-HT operations and device parallelization could result in severe thermal management issues and affect the overall stability and long-term reliability. In addition, problems connected to the reproducibility and long-term stability of 2DHG-based devices still need to be resolved. This review paper aims at addressing these issues by providing the power device research community with a detailed set of physical models, device designs and challenges associated with all the aspects of the diamond power device value chain, from the definition of figures of merit, the material growth and processing conditions, to packaging solutions and targeted applications. Finally, the paper will conclude with suggestions on how to design power converters with diamond devices and will provide the roadmap of diamond device development for power electronics
ANALYSIS OF FAILURE MECHANISMS THAT IMPACT SAFE OPERATION OF ALGAN/GAN HEMTS
The reliability of AlGaN/GaN high electron mobility transistors (HEMTs) is tra- ditionally determined via thermal lifetime acceleration stress tests. More recently it has been proposed that electric field has a prominent role in limiting lifetimes. Multi- ple failure mechanisms have been proposed as a result of device degradation observed when stressed under high applied electric fields, as typical when the device is biased into the OFF-state. One potential reason for multiple mechanisms could be due to varying levels of quality and maturity of the GaN processes in the reported literature.
The work presented in this dissertation seeks to provide clarity and understanding into the failure mechanism of AlGaN/GaN HEMT devices under high electric fields. The devices in this study were fabricated in a commercial GaN process, notable for exceptional ruggedness and industry leading 65V qualified operational bias for RF power amplifiers. A series of OFF-state, high electric field step-stress experiments, as described in literature, were performed to assess if any were applicable to this process.
It was discovered that device degradation could only be induced when stressed close to the breakdown limits. This lead to the development of a unique stress method that enables the device to be held close to catastrophic breakdown, while avoiding an over stress event that would prevent the device from being studied at the conclusion of the experiment. It was discovered via careful electrical and optical analysis that failure was due to a localized degradation of the Schottky gate diode properties. The physical analysis found the failure inconsistent with the widely reported inverse piezoelectric effect. Instead the failures resemble recently proposed time dependent dielectric breakdown of the AlGaN barrier laye
Surface-potential-based compact model for the gate current of p-GaN Gate HEMTs
The gate leakage current of p-GaN gate HEMTs is modeled based on surface potential calculations. The model accurately describes the bias and temperature dependence of the gate leakage. Thermionic emission is the main mechanism of the gate current in forward bias operation while hopping transport component is the main mechanism of gate current in reverse bias operation. This newly developed gate current model was implemented in Verilog-A. A good agreement between the simulations and experimental data demonstrates the accuracy of the model
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